Patents by Inventor Hung-Lin Yin

Hung-Lin Yin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10156489
    Abstract: A piezoresistive pressure sensor includes a substrate and a silicon device layer. The substrate has a cavity. The silicon device layer includes a diaphragm and a support element. A top surface of the diaphragm is connected to a top surface of the support element by one or more side surfaces. A recess of the silicon device layer is defined by the top surface of the diaphragm and the one or more side surfaces. A plurality of piezoresistive regions are on the top surface of the diaphragm, on the one or more side surfaces and on the top surface of the support element. A plurality of conductive regions are on the top surface of the support element. The plurality of conductive regions do not extend to the top surface of the diaphragm. The plurality of piezoresistive regions have a first ion dosage concentration. The plurality of conductive regions have a second ion dosage concentration. The second ion dosage concentration is greater than the first ion dosage concentration.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: December 18, 2018
    Assignee: ASIA PACIFIC MICROSYSTEMS, INC.
    Inventors: Hung-Lin Yin, Cheng-Yi Chiang, Yu-Che Huang
  • Publication number: 20170219449
    Abstract: A piezoresistive pressure sensor includes a substrate and a silicon device layer. The substrate has a cavity. The silicon device layer includes a diaphragm and a support element. A top surface of the diaphragm is connected to a top surface of the support element by one or more side surfaces. A recess of the silicon device layer is defined by the top surface of the diaphragm and the one or more side surfaces. A plurality of piezoresistive regions are on the top surface of the diaphragm, on the one or more side surfaces and on the top surface of the support element. A plurality of conductive regions are on the top surface of the support element. The plurality of conductive regions do not extend to the top surface of the diaphragm. The plurality of piezoresistive regions have a first ion dosage concentration. The plurality of conductive regions have a second ion dosage concentration. The second ion dosage concentration is greater than the first ion dosage concentration.
    Type: Application
    Filed: January 25, 2017
    Publication date: August 3, 2017
    Applicant: Asia Pacific Microsystems, Inc.
    Inventors: Hung-Lin Yin, Cheng-Yi Chiang, Yu-Che Huang
  • Patent number: 9553055
    Abstract: The present disclosure provides a method for fabricating semiconductor devices having reinforcing elements. The method includes steps of providing a first wafer having a lower electrode layer and an insulation layer; forming a device layer; etching the device layer and the insulation layer to form recesses; etching the device layer to form separation trenches and upper electrodes; forming reinforcing elements; and depositing metal pads. The reinforcing elements strengthen the integration of the upper electrodes and the insulation layer.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: January 24, 2017
    Assignee: ASIA PACIFIC MICROSYSTEMS, INC.
    Inventor: Hung-Lin Yin
  • Publication number: 20160240490
    Abstract: The present disclosure provides a method for fabricating semiconductor devices having reinforcing elements. The method includes steps of providing a first wafer having a lower electrode layer and an insulation layer; forming a device layer; etching the device layer and the insulation layer to form recesses; etching the device layer to form separation trenches and upper electrodes; forming reinforcing elements; and depositing metal pads. The reinforcing elements strengthen the integration of the upper electrodes and the insulation layer.
    Type: Application
    Filed: October 26, 2015
    Publication date: August 18, 2016
    Applicant: ASIA PACIFIC MICROSYSTEMS, INC.
    Inventor: Hung-Lin Yin
  • Publication number: 20150279664
    Abstract: The present disclosure provides a method for fabricating semiconductor devices having high-precision gaps. The method includes steps of providing a first wafer; forming two or more regions having various ion dosage concentrations on a first surface of the first wafer; thermally oxidizing the first wafer so as to grow oxide layers with various thicknesses on the first surface of the first wafer; and bonding a second wafer to the thickest oxide layer of the first wafer so as to form one or more gaps.
    Type: Application
    Filed: March 27, 2015
    Publication date: October 1, 2015
    Applicant: ASIA PACIFIC MICROSYSTEMS, INC.
    Inventor: Hung-Lin Yin
  • Patent number: 8916449
    Abstract: A substrate bonding method comprises the following steps. Firstly, a first substrate and a second substrate are provided, wherein a surface of the first substrate is covered by a first Ag layer and a surface of the second substrate is covered by a second Ag layer and a metallic layer from bottom to top, wherein the metallic layer comprises a first Sn layer. Secondly, a bonding process is performed by aligning the first and second substrates followed by bringing the metallic layer into contact with the first Ag layer followed by applying a load while heating to a predetermined temperature in order to form Ag3Sn intermetallic compounds. Finally, cool down and remove the load to complete the bonding process.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 23, 2014
    Assignee: Asia Pacific Microsystems, Inc.
    Inventors: Hung-Lin Yin, Jerwei Hsieh, Li-Yuan Lin
  • Publication number: 20130285248
    Abstract: A substrate bonding method comprises the following steps. Firstly, a first substrate and a second substrate are provided, wherein a surface of the first substrate is covered by a first Ag layer and a surface of the second substrate is covered by a second Ag layer and a metallic layer from bottom to top, wherein the metallic layer comprises a first Sn layer. Secondly, a bonding process is performed by aligning the first and second substrates followed by bringing the metallic layer into contact with the first Ag layer followed by applying a load while heating to a predetermined temperature in order to form Ag3Sn intermetallic compounds. Finally, cool down and remove the load to complete the bonding process.
    Type: Application
    Filed: March 15, 2013
    Publication date: October 31, 2013
    Applicant: Asia Pacific Microsystems, Inc.
    Inventors: Hung-Lin Yin, Jerwei Hsieh, Li-Yuan Lin
  • Publication number: 20070286739
    Abstract: An apparatus for driving microfluids is provided. The apparatus comprises a driving unit and a microfluidic chip. The driving unit comprises a substrate and a film, wherein the film is combined with the substrate. Moreover, the microfluidic chip is coupled with the driving unit.
    Type: Application
    Filed: January 12, 2007
    Publication date: December 13, 2007
    Inventors: Jerwei Hsieh, Hung-Lin Yin