Patents by Inventor Hye-Kwang Park

Hye-Kwang Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240066090
    Abstract: The present disclosure relates to a composition for preventing, improving or treating a metabolic syndrome such as obesity, diabetes, hyperlipidemia and fatty liver, comprising a combination of a Lemon balm extract and a corn silk extract as a natural extract as an active ingredient.
    Type: Application
    Filed: October 21, 2019
    Publication date: February 29, 2024
    Inventors: Beom-Rak CHOI, Sae-Kwang KU, Hye-Rim PARK, Hyun LEE
  • Patent number: 8542180
    Abstract: A method of driving a display panel includes generating a gate on voltage, a first gate off voltage and a second gate off voltage. A clock signal is generated based upon the gate on voltage and the second gate off voltage. A first panel gate off voltage substantially the same as the first gate off voltage and a second panel gate off voltage substantially the same as the second gate off voltage are generated in a first operating mode. A first panel gate off voltage greater than the first gate off voltage and a second panel gate off voltage greater than the second gate off voltage are generated in a second operating mode. A gate signal is generated based upon the clock signal and the first and second panel gate off voltages to a gate line of the display panel.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: September 24, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hye-Kwang Park, Sang-Heon Park, Seung-Hwan Moon
  • Publication number: 20120139436
    Abstract: A method of driving a display panel includes generating a gate on voltage, a first gate off voltage and a second gate off voltage. A clock signal is generated based upon the gate on voltage and the second gate off voltage. A first panel gate off voltage substantially the same as the first gate off voltage and a second panel gate off voltage substantially the same as the second gate off voltage are generated in a first operating mode. A first panel gate off voltage greater than the first gate off voltage and a second panel gate off voltage greater than the second gate off voltage are generated in a second operating mode. A gate signal is generated based upon the clock signal and the first and second panel gate off voltages to a gate line of the display panel.
    Type: Application
    Filed: August 24, 2011
    Publication date: June 7, 2012
    Inventors: Hye-Kwang PARK, Sang-Heon PARK, Seung-Hwan MOON
  • Publication number: 20060262045
    Abstract: A plasma display includes: a plurality of electrodes extending in one direction; at least one inductor coupled between the plurality of electrodes and a power recovery power source; a first transistor coupled either between the at least one inductor and the electrode or between the at least one inductor and the power recovery power source; a second transistor coupled either between the at least one inductor and the electrode or between the at least one inductor and the power recovery power source; and a gate driving circuit adapted to supply either a high or low level voltage to a gate of either the first or second transistor, and including a Light Emitting Diode (LED) adapted to emit light in response to a current flow to the gate, and a first diode coupled to the LED in reverse parallel.
    Type: Application
    Filed: January 24, 2006
    Publication date: November 23, 2006
    Inventor: Hye-Kwang Park