Patents by Inventor Hyo Sub YEOM
Hyo Sub YEOM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12272635Abstract: There are provided a semiconductor device and a manufacturing method thereof. The semiconductor device includes: a stack structure including a plurality of interlayer insulating layers and a plurality of gate conductive layers, which are stacked in an alternating manner; at least one support structure penetrating the stack structure in a substantially vertical manner, the at least one support structure being formed in a contact region; and a contact plug penetrating the stack structure in a substantially vertical manner, the contact plug being formed in the contact region, the contact plug being connected to a contact pad that is disposed on the bottom of the stack structure. The at least one support structure is formed of an oxide layer.Type: GrantFiled: November 16, 2023Date of Patent: April 8, 2025Assignee: SK hynix Inc.Inventors: Jae Yoon Noh, Tae Kyung Kim, Hyo Sub Yeom, Jeong Yun Lee
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Publication number: 20250048640Abstract: A semiconductor memory device includes a semiconductor substrate including an upper surface extending in a horizontal direction, a source structure including a trench extending in the horizontal direction, the source structure disposed above the semiconductor substrate, a metal structure in the trench of the source structure and connecting the source structure to the semiconductor substrate, and memory cell strings disposed on both sides of the trench and connected to the source structure.Type: ApplicationFiled: October 18, 2024Publication date: February 6, 2025Applicant: SK hynix Inc.Inventor: Hyo Sub YEOM
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Publication number: 20240420739Abstract: A semiconductor memory device may include first gate structures each including first real gate lines and first insulating layers that are alternately stacked. The device may also include first dummy gate lines located on the first gate structures, a separation insulating structure configured to extend between the first dummy gate lines and between the first gate structures, and a second gate structure located on the first gate structures and the separation insulating structure and comprising a second dummy gate line having a greater width than each of the first dummy gate lines.Type: ApplicationFiled: October 12, 2023Publication date: December 19, 2024Applicant: SK hynix Inc.Inventors: Hyo Sub YEOM, Kyoung Sik HAN
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Patent number: 12150305Abstract: A semiconductor memory device includes a semiconductor substrate including an upper surface extending in a horizontal direction, a source structure including a trench extending in the horizontal direction, the source structure disposed above the semiconductor substrate, a metal structure in the trench of the source structure and connecting the source structure to the semiconductor substrate, and memory cell strings disposed on both sides of the trench and connected to the source structure.Type: GrantFiled: October 26, 2021Date of Patent: November 19, 2024Assignee: SK hynix Inc.Inventor: Hyo Sub Yeom
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Publication number: 20240170333Abstract: There may be presented a method of manufacturing a semiconductor chip. A first layer stack in which first material layers and second material layers are alternately stacked is formed over a semiconductor substrate including a chip region and a scribe lane region, and first crack propagation guides are formed on the first layer stack. A second layer stack is formed on the first layer stack and the first crack propagation guides, and second crack propagation guides are formed. A semiconductor chip is separated from the semiconductor substrate.Type: ApplicationFiled: February 1, 2024Publication date: May 23, 2024Applicant: SK hynix Inc.Inventor: Hyo Sub YEOM
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Publication number: 20240088021Abstract: There are provided a semiconductor device and a manufacturing method thereof. The semiconductor device includes: a stack structure including a plurality of interlayer insulating layers and a plurality of gate conductive layers, which are stacked in an alternating manner; at least one support structure penetrating the stack structure in a substantially vertical manner, the at least one support structure being formed in a contact region; and a contact plug penetrating the stack structure in a substantially vertical manner, the contact plug being formed in the contact region, the contact plug being connected to a contact pad that is disposed on the bottom of the stack structure. The at least one support structure is formed of an oxide layer.Type: ApplicationFiled: November 16, 2023Publication date: March 14, 2024Applicant: SK hynix Inc.Inventors: Jae Yoon NOH, Tae Kyung KIM, Hyo Sub YEOM, Jeong Yun LEE
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Patent number: 11923247Abstract: There may be presented a method of manufacturing a semiconductor chip. A first layer stack in which first material layers and second material layers are alternately stacked is formed over a semiconductor substrate including a chip region and a scribe lane region, and first crack propagation guides are formed on the first layer stack. A second layer stack is formed on the first layer stack and the first crack propagation guides, and second crack propagation guides are formed. A semiconductor chip is separated from the semiconductor substrate.Type: GrantFiled: September 8, 2021Date of Patent: March 5, 2024Assignee: SK hynix Inc.Inventor: Hyo Sub Yeom
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Patent number: 11901284Abstract: There are provided a semiconductor device and a manufacturing method thereof. The semiconductor device includes: a stack structure including a plurality of interlayer insulating layers and a plurality of gate conductive layers, which are stacked in an alternating manner; at least one support structure penetrating the stack structure in a substantially vertical manner, the at least one support structure being formed in a contact region; and a contact plug penetrating the stack structure in a substantially vertical manner, the contact plug being formed in the contact region, the contact plug being connected to a contact pad that is disposed on the bottom of the stack structure. The at least one support structure is formed of an oxide layer.Type: GrantFiled: May 1, 2020Date of Patent: February 13, 2024Assignee: SK hynix Inc.Inventors: Jae Yoon Noh, Tae Kyung Kim, Hyo Sub Yeom, Jeong Yun Lee
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Patent number: 11862555Abstract: There are provided a semiconductor device and a manufacturing method thereof. The semiconductor device includes: a stack structure including a plurality of interlayer insulating layers and a plurality of gate conductive layers, which are stacked in an alternating manner; at least one support structure penetrating the stack structure in a substantially vertical manner, the at least one support structure being formed in a contact region; and a contact plug penetrating the stack structure in a substantially vertical manner, the contact plug being formed in the contact region, the contact plug being connected to a contact pad that is disposed on the bottom of the stack structure. The at least one support structure is formed of an oxide layer.Type: GrantFiled: May 1, 2020Date of Patent: January 2, 2024Assignee: SK hynix Inc.Inventors: Jae Yoon Noh, Tae Kyung Kim, Hyo Sub Yeom, Jeong Yun Lee
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Publication number: 20230328983Abstract: There are provided a semiconductor memory device and a manufacturing method of the semiconductor memory device. The semiconductor memory device includes a first source structure and a second source structure spaced apart from each other over a semiconductor substrate, a filling pattern between the first source structure and the second source structure, a memory cell array overlapping with the first source structure, and a discharge contact penetrating the second source structure and connected to the semiconductor substrate.Type: ApplicationFiled: October 5, 2022Publication date: October 12, 2023Applicant: SK hynix Inc.Inventor: Hyo Sub YEOM
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Publication number: 20230021440Abstract: There are provided a semiconductor memory device and a manufacturing method of the semiconductor memory device. The semiconductor memory device includes a metal pattern including a first line part extending in a first direction and a second line part which is connected to the first line part and extends in a second direction to intersect with the first line part, and a source structure which has a trench. The metal pattern is formed in the trench and the source structure is in contact with a sidewall of the metal pattern.Type: ApplicationFiled: December 16, 2021Publication date: January 26, 2023Applicant: SK hynix Inc.Inventors: Hyo Sub YEOM, Seung Ju OH
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Publication number: 20220367506Abstract: A semiconductor memory device includes a semiconductor substrate including an upper surface extending in a horizontal direction, a source structure including a trench extending in the horizontal direction, the source structure disposed above the semiconductor substrate, a metal structure in the trench of the source structure and connecting the source structure to the semiconductor substrate, and memory cell strings disposed on both sides of the trench and connected to the source structure.Type: ApplicationFiled: October 26, 2021Publication date: November 17, 2022Applicant: SK hynix Inc.Inventor: Hyo Sub YEOM
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Publication number: 20220352023Abstract: There may be presented a method of manufacturing a semiconductor chip. A first layer stack in which first material layers and second material layers are alternately stacked is formed over a semiconductor substrate including a chip region and a scribe lane region, and first crack propagation guides are formed on the first layer stack. A second layer stack is formed on the first layer stack and the first crack propagation guides, and second crack propagation guides are formed. A semiconductor chip is separated from the semiconductor substrate.Type: ApplicationFiled: September 8, 2021Publication date: November 3, 2022Applicant: SK hynix Inc.Inventor: Hyo Sub YEOM
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Publication number: 20210090994Abstract: There are provided a semiconductor device and a manufacturing method thereof. The semiconductor device includes: a stack structure including a plurality of interlayer insulating layers and a plurality of gate conductive layers, which are stacked in an alternating manner; at least one support structure penetrating the stack structure in a substantially vertical manner, the at least one support structure being formed in a contact region; and a contact plug penetrating the stack structure in a substantially vertical manner, the contact plug being formed in the contact region, the contact plug being connected to a contact pad that is disposed on the bottom of the stack structure. The at least one support structure is formed of an oxide layer.Type: ApplicationFiled: May 1, 2020Publication date: March 25, 2021Applicant: SK hynix Inc.Inventors: Jae Yoon NOH, Tae Kyung KIM, Hyo Sub YEOM, Jeong Yun LEE