Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip; and a passivation layer disposed on the second interconnection member.

Abstract: A fan-out semiconductor package is provided. A semiconductor chip is disposed in a through hole of a first connection member. At least a portion of the semiconductor chip is encapsulated by an encapsulant. A second connection member including a redistribution layer is formed on an active surface of the semiconductor chip. An external connection terminal having excellent reliability is formed on the encapsulant.

Abstract: A fan-out semiconductor package is provided. A semiconductor chip is disposed in a through hole of a first connection member. At least a portion of the semiconductor chip is encapsulated by an encapsulant. A second connection member including a redistribution layer is formed on an active surface of the semiconductor chip. An external connection terminal having excellent reliability is formed on the encapsulant.

Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole, having an active surface having a connection pad disposed thereon and an inactive surface opposing the active surface, and having a protrusion bump disposed on the connection pad; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; and a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip. In the fan-out semiconductor package, step portions of the protrusion bumps may be removed.

Abstract: An electronic component package and a method of manufacturing an electronic component package are provided. An electronic component package includes a frame having a cavity, an electronic component disposed in the cavity, a redistribution layer disposed adjacent to the frame and electrically connected to the electronic component, and an encapsulation material encapsulating the electronic component and having an elastic modulus smaller than that of a material constituting the frame.

Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; and a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip.

Abstract: Provided is an intrusion simulator, and more particularly, an intrusion simulator capable of reproducing a situation in which a passenger's ankle is broken at the time of intrusion of a structure such as a steering gear box due to a head-on collision of a vehicle and a collision situation of passenger's knees with a wheel or a dash board due to the intruded structure, and applying the accelerating force using the automatically controllable servo actuator to reproduce each situation to perform the simulation so as to obtain the accurately measured values, and to improve a structure of the vehicle body in the development or production of the vehicle.

Abstract: A display device includes a first substrate having a first lower column spacer disposed in a peripheral area, extending in a direction, and including first and second opposing slanted sides, a second substrate opposing the first substrate, the second substrate including a first upper column spacer disposed in the first peripheral area, extending in the same direction, including a slanted side, and disposed adjacent to the first side of the first lower column spacer, and a second upper column spacer having substantially a same shape as the first upper column spacer and disposed adjacent to the second side of the first lower column spacer, where the first peripheral area is disposed outside a display area of the display device.

Abstract: A display apparatus includes a first substrate, a color filter, a gap maintaining pattern, a column spacer, and a blocking dam. The first substrate includes a display area and a peripheral area surrounding the display area. The color filter is disposed in the display area. The gap maintaining pattern is disposed in the peripheral area in a same layer as the color filter. The column spacer is disposed on the color filter. The blocking dam is disposed in a same layer as the column spacer and overlaps the gap maintaining pattern. The difference between the gap of the first and second substrates in the display area and the gap of the first and second substrates in the peripheral area may be decreased.

Abstract: A fan-out semiconductor package includes a frame having a through hole, a semiconductor chip disposed in the through hole and including connection pads, an encapsulant encapsulating at least a portion of the frame and the semiconductor chip, and a redistribution layer disposed on the frame and the semiconductor chip and including a first region and a second region. In the first region, a first via and a second via, electrically connected to one of the connection pads, disposed in different layers, and connected by a wiring pattern, are disposed. In the second region, a third via and a fourth via, electrically connected to another of the connection pads, disposed in different layers, and connected by the wiring pattern, are disposed. A distance between axes of the first via and the second via is shorter than a distance between axes of the third via and the fourth via.

Abstract: A fan-out semiconductor package includes a frame having a through hole, a semiconductor chip disposed in the through hole and including connection pads, an encapsulant encapsulating at least a portion of the frame and the semiconductor chip, and a redistribution layer disposed on the frame and the semiconductor chip and including a first region and a second region. In the first region, a first via and a second via, electrically connected to one of the connection pads, disposed in different layers, and connected by a wiring pattern, are disposed. In the second region, a third via and a fourth via, electrically connected to another of the connection pads, disposed in different layers, and connected by the wiring pattern, are disposed. A distance between axes of the first via and the second via is shorter than a distance between axes of the third via and the fourth via.

Abstract: A fan-out semiconductor package includes a frame having a through hole, a semiconductor chip disposed in the through hole and including connection pads, an encapsulant encapsulating at least a portion of the frame and the semiconductor chip, and a redistribution layer disposed on the frame and the semiconductor chip and including a first region and a second region. In the first region, a first via and a second via, electrically connected to one of the connection pads, disposed in different layers, and connected by a wiring pattern, are disposed. In the second region, a third via and a fourth via, electrically connected to another of the connection pads, disposed in different layers, and connected by the wiring pattern, are disposed. A distance between axes of the first via and the second via is shorter than a distance between axes of the third via and the fourth via.

Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip; and a passivation layer disposed on the second interconnection member.

Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface and an inactive surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads of the semiconductor chip; a passivation layer disposed on the second interconnection member; and an under-bump metal layer including an external connection pad formed on the passivation layer and a plurality of vias connecting the external connection pad and the redistribution layer of the second interconnection member to each other, wherein the first interconnection member includes a redistribution layer electrically connected to the connection pads of the semiconductor chi

Abstract: Provided is a hybrid servo actuator for a crash test, and more particularly, a hybrid servo actuator for a crash test in which an operating part including a piston and a rod, a chamber supplying an air pressure to the operating part, and a controller controlling a movement of the operating part are integrally formed, thereby increasing a moving speed in a stroke direction of the operating part more than in a general hydraulic cylinder and pneumatic cylinder. The actuator includes an oil pressure cushion type cushion part provided therein to absorb a shock generated by a shock of an operating part even at the time of a malfunction of the operating part and discharge an oil pressure generated by the shock to the outside and thus is used semi-permanently.

Abstract: Provided is a weight balancing type dynamic yawing simulator, and more particularly, a weight balancing type dynamic yawing simulator capable of reproducing real crash situations and preventing a weight from leaning to one side by providing a simulator capable of reproducing crash results of a side direction and yawing to the existing simulator capable of reproducing crash results of a front direction, pitching, and a vertical direction of a vehicle, by providing a dynamic yawing simulator of a pitching and yawing composite safety apparatus type capable of reproducing crash results due to a side direction and yawing in a crash simulator for a vehicle, thereby preventing the simulator apparatus from being separated and broken.

Abstract: A display substrate includes a substrate, a plurality of first sensing loops and second sensing loops, an insulating layer covering the first and second sensing loops, a plurality of bridges disposed on the insulating layer, a gate line disposed on the insulating layer, and a transistor connected to the gate line, the transistor being disposed on the insulating layer. The first sensing loops are arranged on the substrate in a first direction at a predetermined interval. The second sensing loops are arranged on the substrate in a second direction different from the first direction at a predetermined interval. The second sensing loops are electrically separated from the first sensing loops. Each of the second sensing loops includes passing regions at which the first sensing loops pass through. One side of each of the first sensing loops and one side of each of the second sensing loops are open.

Abstract: A fan-out semiconductor package may include: a first connection member having a through hole; a semiconductor chip disposed in the through hole and having an active surface on which a connection pad is disposed and a non-active surface opposing the active surface; an encapsulant at least partially encapsulating the first connection member and the non-active surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pad, wherein the first connection member includes a first insulating layer, a first redistribution layer embedded in the first insulating layer while contacting the second connection member, and a second redistribution layer disposed on the other side of the first insulating layer opposing one side thereof in which the first redistribution layer is embedded.

Abstract: The exemplary embodiments relate generally to a display device that may include: a first substrate and a second substrate, each including a transparent encapsulation area; an outer sealant along a side of the transparent encapsulation area; a pattern part disposed on the first substrate and extending in a direction parallel to the outer sealant; and a transparent sealant adjacent to the pattern part and extending in a direction parallel to the pattern part, and a manufacturing method thereof.

Abstract: A liquid crystal display includes a first substrate including: a display area including a plurality of pixels on the first substrate, a non-display area which is disposed on an outside of the display area and in which a dummy wire is disposed on the first substrate, and an image input hole which is defined therein in the non-display area and in which an image input device is disposed, a second substrate facing the first substrate and including a display area and a non-display area corresponding to those of the first substrate, a liquid crystal layer interposed between the first and second substrates, and a sealant which is in the non-display area of the first and second substrates and seals the liquid crystal layer between the first and second substrates. The dummy wire is disposed near the image input hole.