Patents by Inventor Hyun-gi Hong
Hyun-gi Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240128502Abstract: An embodiment solid electrolyte includes a first compound and a second compound. The first compound is represented by a first chemical formula Li7-aPS6-a(X11-bX2b)a, wherein X1 and X2 are the same or different and each represents F, Cl, Br, or I, and wherein 0<a?2 and 0<b<1, and the second compound is represented by a second chemical formula Li7-cP1-2dMdS6-c-3d(X11-eX2e)c, wherein X1 and X2 are the same or different and each represents F, Cl, Br, or I, wherein M represents Ge, Si, Sn, or any combination thereof, and wherein 0<c?2, 0<d<0.5, and 0<e<1.Type: ApplicationFiled: August 14, 2023Publication date: April 18, 2024Inventors: Sa Heum Kim, Yong Jun Jang, Yong Gu Kim, Sung Man Cho, Sun Ho Choi, Seong Hyeon Choi, Kyu Sung Park, Young Gyoon Ryu, Suk Gi Hong, Pil Sang Yun, Myeong Ju Ha, Hyun Beom Kim, Hwi Chul Yang
-
Patent number: 11950476Abstract: A display device includes a substrate; a transistor disposed on the substrate; a first insulating layer disposed on the transistor; and a first pixel electrode and a second pixel electrode disposed on the first insulating layer to be adjacent to each other. The first insulating layer includes a first opening between the first pixel electrode and the second pixel electrode.Type: GrantFiled: April 17, 2020Date of Patent: April 2, 2024Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Jun Ho Choi, Chun Gi You, Seong Kweon Heo, Eun Young You, Hyun Jin Hong
-
Patent number: 11893945Abstract: The display device includes a first data line group including data lines connected to pixels arranged at a first resolution; a second data line group including data lines connected to pixels arranged at the first resolution and pixels arranged at a second resolution; a first gamma compensation voltage generation unit that divides a first reference voltage and outputs a gamma compensation voltage; a second gamma compensation voltage generation unit that divides a second reference voltage and outputs gamma compensation voltages; a first data drive unit that converts pixel data into the gamma compensation voltage output from the first gamma compensation voltage generation unit and outputs a data voltage to the first data line group; and a second data drive unit that converts pixel data into the gamma compensation voltage output from the second gamma compensation voltage generation unit and outputs a data voltage to the second data line group.Type: GrantFiled: November 17, 2022Date of Patent: February 6, 2024Assignee: LG Display Co., Ltd.Inventors: Seung Jin Yoo, Hyun Gi Hong
-
Patent number: 11862057Abstract: A display device comprises: pixels connected to a power line to which a pixel driving voltage is supplied; data lines that extend in a first direction and are connected to the pixels, the data lines applying data voltages of an image to the pixels; gate lines that are connected to the pixels and extend in a second direction, the gate lines applying gate signals to the pixels; a data driver configured to supply the data voltages to the data lines during a display mode, and to supply sensing data to the data lines during a sensing mode; a gate driver configured to supply the gate signals to the gate lines; and a sensing circuit configured to sense current flowing through the power line that is connected to a subset of pixels from the pixels during the sensing mode, the subset of pixels arranged along the first direction.Type: GrantFiled: October 6, 2022Date of Patent: January 2, 2024Assignee: LG Display Co., Ltd.Inventors: Jin Woo Jung, Seung Jin Yoo, Hyun Gi Hong
-
Publication number: 20230215306Abstract: A display device comprises: pixels connected to a power line to which a pixel driving voltage is supplied; data lines that extend in a first direction and are connected to the pixels, the data lines applying data voltages of an image to the pixels; gate lines that are connected to the pixels and extend in a second direction, the gate lines applying gate signals to the pixels; a data driver configured to supply the data voltages to the data lines during a display mode, and to supply sensing data to the data lines during a sensing mode; a gate driver configured to supply the gate signals to the gate lines; and a sensing circuit configured to sense current flowing through the power line that is connected to a subset of pixels from the pixels during the sensing mode, the subset of pixels arranged along the first direction.Type: ApplicationFiled: October 6, 2022Publication date: July 6, 2023Inventors: Jin Woo Jung, Seung Jin Yoo, Hyun Gi Hong
-
Publication number: 20230137365Abstract: A display device includes: a plurality of pixels connected to power lines to which a pixel driving voltage and a reference voltage are applied, a plurality of data lines to which data voltages of pixel data of an input image are applied, and a plurality of gate lines to which a gate signal is applied; a display panel driver configured to write the pixel data of the input image to the plurality of pixels during a display mode of the display device and to write preset sensing data to the plurality of pixels during a sensing mode of the display device; and a sensing unit configured to simultaneously sense the plurality of the pixels by measuring a current flowing through a first power line from the plurality of power lines to which the pixel driving voltage is applied to the plurality of pixels during the sensing mode.Type: ApplicationFiled: October 4, 2022Publication date: May 4, 2023Inventors: Hyun Gi Hong, Jong Hee Hwang
-
Publication number: 20230079387Abstract: The display device includes a first data line group including data lines connected to pixels arranged at a first resolution; a second data line group including data lines connected to pixels arranged at the first resolution and pixels arranged at a second resolution; a first gamma compensation voltage generation unit that divides a first reference voltage and outputs a gamma compensation voltage; a second gamma compensation voltage generation unit that divides a second reference voltage and outputs gamma compensation voltages; a first data drive unit that converts pixel data into the gamma compensation voltage output from the first gamma compensation voltage generation unit and outputs a data voltage to the first data line group; and a second data drive unit that converts pixel data into the gamma compensation voltage output from the second gamma compensation voltage generation unit and outputs a data voltage to the second data line group.Type: ApplicationFiled: November 17, 2022Publication date: March 16, 2023Inventors: Seung Jin Yoo, Hyun Gi Hong
-
Patent number: 11574602Abstract: The display device includes a first data line group including data lines connected to pixels arranged at a first resolution; a second data line group including data lines connected to pixels arranged at the first resolution and pixels arranged at a second resolution; a first gamma compensation voltage generation unit that divides a first reference voltage and outputs a gamma compensation voltage; a second gamma compensation voltage generation unit that divides a second reference voltage and outputs gamma compensation voltages; a first data drive unit that converts pixel data into the gamma compensation voltage output from the first gamma compensation voltage generation unit and outputs a data voltage to the first data line group; and a second data drive unit that converts pixel data into the gamma compensation voltage output from the second gamma compensation voltage generation unit and outputs a data voltage to the second data line group.Type: GrantFiled: July 9, 2021Date of Patent: February 7, 2023Assignee: LG Display Co., Ltd.Inventors: Seung Jin Yoo, Hyun Gi Hong
-
Publication number: 20220068219Abstract: The display device includes a first data line group including data lines connected to pixels arranged at a first resolution; a second data line group including data lines connected to pixels arranged at the first resolution and pixels arranged at a second resolution; a first gamma compensation voltage generation unit that divides a first reference voltage and outputs a gamma compensation voltage; a second gamma compensation voltage generation unit that divides a second reference voltage and outputs gamma compensation voltages; a first data drive unit that converts pixel data into the gamma compensation voltage output from the first gamma compensation voltage generation unit and outputs a data voltage to the first data line group; and a second data drive unit that converts pixel data into the gamma compensation voltage output from the second gamma compensation voltage generation unit and outputs a data voltage to the second data line group.Type: ApplicationFiled: July 9, 2021Publication date: March 3, 2022Inventors: Seung Jin Yoo, Hyun Gi Hong
-
Patent number: 9853111Abstract: A method of manufacturing a semiconductor device includes forming active fins on a substrate; forming source/drain regions on the active fins on both sides of a gate structure, the gate structure extending in a direction intersecting with a direction in which the active fins extend; forming an etch stop layer on the source/drain regions; forming an interlayer dielectric layer on the etch stop layer; forming a first opening by partially removing the interlayer dielectric layer so as not to expose the etch stop layer; forming an impurity region within the interlayer dielectric layer by implanting a first impurity ion through the first opening; forming a second opening by removing the impurity region so as to expose the etch stop layer; implanting a second impurity ion into the exposed etch stop layer; and removing the exposed etch stop layer.Type: GrantFiled: June 6, 2016Date of Patent: December 26, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Kyung In Choi, Bon Young Koo, Hyun Gi Hong
-
Patent number: 9812559Abstract: Provided are a semiconductor device and a method of fabricating the same. The method comprises forming an active fin extending along a first direction; forming a field insulating layer exposing an upper part of the active fin, along long sides of the active fin; forming a dummy gate pattern extending along a second direction intersecting the first direction, on the active fin; forming a spacer on at least one side of the dummy gate pattern; forming a liner layer covering the active fin exposed by the spacer and the dummy gate pattern; forming a dopant supply layer containing a dopant element, on the liner layer; and forming a doped region in the active fin along an upper surface of the active fin by heat-treating the dopant supply layer.Type: GrantFiled: August 15, 2016Date of Patent: November 7, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Kyung-In Choi, Bong-Soo Kim, Hyun-Seung Kim, Hyun-Gi Hong
-
Patent number: 9793432Abstract: Light emitting devices and methods of manufacturing the light emitting devices. The light emitting devices include a silicon substrate; a metal buffer layer on the silicon substrate, a patterned distributed Bragg reflector (DBR) on the metal buffer layer; and a nitride-based thin film layer on the patterned DBR and regions between patterns of the DBR.Type: GrantFiled: December 1, 2015Date of Patent: October 17, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun-Youn Kim, Bok-ki Min, Hyun-gi Hong, Jae-won Lee
-
Publication number: 20170069737Abstract: Provided are a semiconductor device and a method of fabricating the same. The method comprises forming an active fin extending along a first direction; forming a field insulating layer exposing an upper part of the active fin, along long sides of the active fin; forming a dummy gate pattern extending along a second direction intersecting the first direction, on the active fin; forming a spacer on at least one side of the dummy gate pattern; forming a liner layer covering the active fin exposed by the spacer and the dummy gate pattern; forming a dopant supply layer containing a dopant element, on the liner layer; and forming a doped region in the active fin along an upper surface of the active fin by heat-treating the dopant supply layer.Type: ApplicationFiled: August 15, 2016Publication date: March 9, 2017Inventors: Kyung-In CHOI, Bong-Soo KIM, Hyun-Seung KIM, Hyun-Gi HONG
-
Publication number: 20160359008Abstract: A method of manufacturing a semiconductor device includes forming active fins on a substrate; forming source/drain regions on the active fins on both sides of a gate structure, the gate structure extending in a direction intersecting with a direction in which the active fins extend; forming an etch stop layer on the source/drain regions; forming an interlayer dielectric layer on the etch stop layer; forming a first opening by partially removing the interlayer dielectric layer so as not to expose the etch stop layer; forming an impurity region within the interlayer dielectric layer by implanting a first impurity ion through the first opening; forming a second opening by removing the impurity region so as to expose the etch stop layer; implanting a second impurity ion into the exposed etch stop layer; and removing the exposed etch stop layer.Type: ApplicationFiled: June 6, 2016Publication date: December 8, 2016Inventors: Kyung In Choi, Bon Young Koo, Hyun Gi Hong
-
Patent number: 9422638Abstract: Crack formation and propagation in a silicon substrate may be reduced by forming a crack reducing portion. The silicon substrate includes a silicon main portion and a silicon edge portion formed around the silicon main portion. The crack reducing portion is formed on the silicon edge portion of the silicon substrate such that the directions of crystal faces in the crack reducing portion are randomly oriented.Type: GrantFiled: September 13, 2012Date of Patent: August 23, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Jun-youn Kim, Jae-Kyun Kim, Su-hee Chae, Hyun-gi Hong
-
Publication number: 20160149003Abstract: In methods of manufacturing a semiconductor device, a stress channel layer is formed on a semiconductor substrate. A first ion-implantation process is performed on the semiconductor substrate or the stress channel layer at a temperature ranging from about 100° C. to about 600° C. A gate structure is formed on the stress channel layer. A first source/drain region is formed at an upper portion of the stress channel layer adjacent to the gate structure.Type: ApplicationFiled: September 16, 2015Publication date: May 26, 2016Inventors: Kyung-In Choi, Wook-Je Kim, Baek-Hap Choi, Jin-Hee Han, Hyun-Gi Hong
-
Publication number: 20160111592Abstract: Light emitting devices and methods of manufacturing the light emitting devices. The light emitting devices include a silicon substrate; a metal buffer layer on the silicon substrate, a patterned distributed Bragg reflector (DBR) on the metal buffer layer; and a nitride-based thin film layer on the patterned DBR and regions between patterns of the DBR.Type: ApplicationFiled: December 1, 2015Publication date: April 21, 2016Inventors: Jun-youn KIM, Bok-ki MIN, Hyun-gi HONG, Jae-won LEE
-
Patent number: 9246048Abstract: Example embodiments are directed to light-emitting devices (LEDs) and methods of manufacturing the same. The LED includes a first semiconductor layer; a second semiconductor layer; an active layer formed between the first and second semiconductor layers; and an emission pattern layer including a plurality of layers on the first semiconductor layer, the emission pattern including an emission pattern for externally emitting light generated from the active layer.Type: GrantFiled: December 9, 2014Date of Patent: January 26, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Su-hee Chae, Young-soo Park, Bok-ki Min, Jun-youn Kim, Hyun-gi Hong
-
Patent number: 9224909Abstract: Light emitting devices and methods of manufacturing the light emitting devices. The light emitting devices include a silicon substrate; a metal buffer layer on the silicon substrate, a patterned dispersion Bragg reflection (DBR) layer on the metal buffer layer; and a nitride-based thin film layer on the patterned DBR layer and regions between patterns of the DBR layer.Type: GrantFiled: May 29, 2013Date of Patent: December 29, 2015Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun-youn Kim, Bok-ki Min, Hyun-gi Hong, Jae-won Lee
-
Publication number: 20150093848Abstract: Example embodiments are directed to light-emitting devices (LEDs) and methods of manufacturing the same. The LED includes a first semiconductor layer; a second semiconductor layer; an active layer formed between the first and second semiconductor layers; and an emission pattern layer including a plurality of layers on the first semiconductor layer, the emission pattern including an emission pattern for externally emitting light generated from the active layer.Type: ApplicationFiled: December 9, 2014Publication date: April 2, 2015Inventors: Su-hee CHAE, Young-soo PARK, Bok-ki MIN, Jun-youn KIM, Hyun-gi HONG