Abstract: Image sensors are provided. An image sensor includes a semiconductor substrate including a pixel region and an optical black region. The image sensor includes a plurality of photoelectric conversion regions in the pixel region. The image sensor includes a wiring structure on a first surface of the semiconductor substrate. The image sensor includes a light shielding layer on a second surface of the semiconductor substrate in the optical black region. Moreover, the image sensor includes a light shielding wall structure that is in the semiconductor substrate between the pixel region and the optical black region and that is connected to the light shielding layer.

Abstract: Image sensors are provided. An image sensor includes a semiconductor substrate including a pixel region and an optical black region. The image sensor includes a plurality of photoelectric conversion regions in the pixel region. The image sensor includes a wiring structure on a first surface of the semiconductor substrate. The image sensor includes a light shielding layer on a second surface of the semiconductor substrate in the optical black region. Moreover, the image sensor includes a light shielding wall structure that is in the semiconductor substrate between the pixel region and the optical black region and that is connected to the light shielding layer.

Abstract: In a method of manufacturing an image sensor, photodiodes may be formed on a semiconductor layer in an active pixel region and a peripheral region. A structure including insulating interlayers and wiring structures may be formed on a first surface of the semiconductor layer in the active pixel region, the peripheral region and an input/output (I/O) region. The semiconductor layer and a first insulating interlayer of the insulating interlayers on the I/O region may be partially etched to form a via hole exposing a first wiring structure of the wiring structures. A first metal layer and a second metal layer may be formed on a second surface of the semiconductor layer and the via hole. The second metal layer may be patterned to form a second pad pattern on the semiconductor layer in the I/O region. An anti-reflective layer may be formed on the first metal layer and the second pad pattern.

Abstract: In a method of manufacturing an image sensor, photodiodes may be formed on a semiconductor layer in an active pixel region and a peripheral region. A structure including insulating interlayers and wiring structures may be formed on a first surface of the semiconductor layer in the active pixel region, the peripheral region and an input/output (I/O) region. The semiconductor layer and a first insulating interlayer of the insulating interlayers on the I/O region may be partially etched to form a via hole exposing a first wiring structure of the wiring structures. A first metal layer and a second metal layer may be formed on a second surface of the semiconductor layer and the via hole. The second metal layer may be patterned to form a second pad pattern on the semiconductor layer in the I/O region. An anti-reflective layer may be formed on the first metal layer and the second pad pattern.

Abstract: Provided are a semiconductor chip, a semiconductor package and a fabricating method thereof, which can reduce or prevent cracks from being generated or propagated due to an external pressure. The semiconductor chip includes a semiconductor substrate including a first region and a second region, a plurality of interlayer insulation layers formed on the semiconductor substrate, a first crack stopper formed in the plurality of interlayer insulation layers of the first region, an interconnector formed in the plurality of interlayer insulation layers of the second region, a pad wire formed on the plurality of interlayer insulation layers, electrically connected to the interconnector in the second region and extending to the first region, a bonding pad on the plurality of interlayer insulation layers of the first region, electrically connected to the pad wire, and a protection layer covering the pad wire and exposing the bonding pad.

Abstract: Provided are a semiconductor device including a high voltage transistor and a low voltage transistor and a method of manufacturing the same. The semiconductor device includes a semiconductor substrate including a high voltage region and a low voltage region; a high voltage transistor formed in the high voltage region and including a first active region, a first source/drain region, a first gate insulating layer, and a first gate electrode; and a low voltage transistor formed in the low voltage region and including a second active region, a second source/drain region, a second gate insulating layer, and a second gate electrode. The second source/drain region has a smaller thickness than a thickness of the first source/drain region.

Abstract: Image sensors are provided. The image sensors can include a photodiode in a substrate configured to generate signal charges based on incident light, a charge storage unit positioned at a side of the photodiode configured to temporarily store the signal charges generated by the photodiode, and a shield metal on the charge storage unit and on the substrate.

Abstract: Provided are a semiconductor chip, a semiconductor package and a fabricating method thereof, which can reduce or prevent cracks from being generated or propagated due to an external pressure. The semiconductor chip includes a semiconductor substrate including a first region and a second region, a plurality of interlayer insulation layers formed on the semiconductor substrate, a first crack stopper formed in the plurality of interlayer insulation layers of the first region, an interconnector formed in the plurality of interlayer insulation layers of the second region, a pad wire formed on the plurality of interlayer insulation layers, electrically connected to the interconnector in the second region and extending to the first region, a bonding pad on the plurality of interlayer insulation layers of the first region, electrically connected to the pad wire, and a protection layer covering the pad wire and exposing the bonding pad.

Abstract: A substrate structure include a lower substrate doped with n-type impurities having a first impurity concentration, an epitaxial layer on the lower substrate, and a metallic-contaminant collection area spaced apart from the epitaxial layer in the lower substrate, the metallic-contaminant collection area doped with impurities having a second impurity concentration higher than the first impurity concentration, the metallic-contaminant collection area having lattice defects, and an upper surface of the metallic-contaminant collection area being spaced apart from a top surface of the lower substrate at a distance in a range of about 0.1 ?m to about 3 ?m.

Abstract: Provided are a semiconductor device including a high voltage transistor and a low voltage transistor and a method of manufacturing the same. The semiconductor device includes a semiconductor substrate including a high voltage region and a low voltage region; a high voltage transistor formed in the high voltage region and including a first active region, a first source/drain region, a first gate insulating layer, and a first gate electrode; and a low voltage transistor formed in the low voltage region and including a second active region, a second source/drain region, a second gate insulating layer, and a second gate electrode. The second source/drain region has a smaller thickness than a thickness of the first source/drain region.

Abstract: Provided are a semiconductor device including a high voltage transistor and a low voltage transistor and a method of manufacturing the same. The semiconductor device includes a semiconductor substrate including a high voltage region and a low voltage region; a high voltage transistor formed in the high voltage region and including a first active region, a first source/drain region, a first gate insulating layer, and a first gate electrode; and a low voltage transistor formed in the low voltage region and including a second active region, a second source/drain region, a second gate insulating layer, and a second gate electrode. The second source/drain region has a smaller thickness than a thickness of the first source/drain region.

Abstract: Provided are a semiconductor device including a high voltage transistor and a low voltage transistor and a method of manufacturing the same. The semiconductor device includes a semiconductor substrate including a high voltage region and a low voltage region; a high voltage transistor formed in the high voltage region and including a first active region, a first source/drain region, a first gate insulating layer, and a first gate electrode; and a low voltage transistor formed in the low voltage region and including a second active region, a second source/drain region, a second gate insulating layer, and a second gate electrode. The second source/drain region has a smaller thickness than a thickness of the first source/drain region.

Abstract: A shared-pixel-type image sensor including a shared floating diffusion region formed in a semiconductor substrate; first and second adjacent photoelectric conversion regions sharing the floating diffusion region; two transmission elements that alternately transfer electric charges accumulated in the first and second photoelectric conversion regions to the shared floating diffusion region, respectively; a drive element for outputting the electric charges of the shared floating diffusion region; a first contact formed on the floating diffusion region; a second contact formed on the drive element; and a local wire that connects the first and second contacts to electrically connect the floating diffusion region and the drive element, wherein the local wire is formed at a level lower than respective top surfaces of the first and second contacts.

Abstract: An image sensor and a method of manufacturing the same are provided. The image sensor includes a substrate having a sensor array area and a peripheral circuit area a first insulating film structure formed on the peripheral circuit area and including a plurality of first multi-layer wiring lines and a second insulating film structure formed on the sensor array area and including a plurality of second multi-layer wiring lines. The uppermost-layer wiring line of the plurality of first multi-layer wiring lines is higher than that of the uppermost-layer wiring line of the plurality of second multi-layer wiring lines. The first insulating film structure includes an isotropic etch-stop layer, and the second insulating film structure does not include the isotropic etch-stop layer.

Abstract: Method of manufacturing image sensors having a plurality of gettering regions. In the method, a gate electrode may be formed on a semiconductor substrate. A source/drain region may be formed in the semiconductor substrate to be overlapped with the gate electrode. A gettering region may be formed in the semiconductor substrate to be adjacent to the source/drain region.

Abstract: Provided may be a treatment method to remove defects created on the surface of a substrate, a method of fabricating an image sensor by using the treatment method, and an image sensor fabricated by the same. The treatment method may include providing a semiconductor substrate including a surface defect, providing a chemical solution to a surface of the semiconductor substrate, and removing the surface defect by consuming the surface of the semiconductor substrate and forming a chemical oxide layer on the semiconductor substrate.

Abstract: Method of manufacturing image sensors having a plurality of gettering regions. In the method, a gate electrode may be formed on a semiconductor substrate. A source/drain region may be formed in the semiconductor substrate to be overlapped with the gate electrode. A gettering region may be formed in the semiconductor substrate to be adjacent to the source/drain region.

Abstract: A shared-pixel-type image sensor including a shared floating diffusion region formed in a semiconductor substrate; first and second adjacent photoelectric conversion regions sharing the floating diffusion region; two transmission elements that alternately transfer electric charges accumulated in the first and second photoelectric conversion regions to the shared floating diffusion region, respectively; a drive element for outputting the electric charges of the shared floating diffusion region; a first contact formed on the floating diffusion region; a second contact formed on the drive element; and a local wire that connects the first and second contacts to electrically connect the floating diffusion region and the drive element, wherein the local wire is formed at a level lower than respective top surfaces of the first and second contacts.

Abstract: An image sensor and a method of manufacturing the same are provided. The image sensor includes a substrate having a sensor array area and a peripheral circuit area a first insulating film structure formed on the peripheral circuit area and including a plurality of first multi-layer wiring lines and a second insulating film structure formed on the sensor array area and including a plurality of second multi-layer wiring lines. The uppermost-layer wiring line of the plurality of first multi-layer wiring lines is higher than that of the uppermost-layer wiring line of the plurality of second multi-layer wiring lines. The first insulating film structure includes an isotropic etch-stop layer, and the second insulating film structure does not include the isotropic etch-stop layer.

Abstract: Provided may be a treatment method to remove defects created on the surface of a substrate, a method of fabricating an image sensor by using the treatment method, and an image sensor fabricated by the same. The treatment method may include providing a semiconductor substrate including a surface defect, providing a chemical solution to a surface of the semiconductor substrate, and removing the surface defect by consuming the surface of the semiconductor substrate and forming a chemical oxide layer on the semiconductor substrate.