Abstract: An apparatus for estimating bio-information includes: a sensor including one or more light sources configured to emit light to an object and a plurality of detectors configured to detect light reflected from the object; and a processor configured to transform a plurality of light quantities obtained from respective detectors of the plurality of detectors to a distance domain, to combine the plurality of transformed light quantities in the distance domain, to correct the combined light quantity based on a reference light quantity for correcting a deviation of a distance between the one or more light sources and the plurality of detectors, and to estimate bio-information based on a light quantity resulting from the correction.

Abstract: A method of reinforcement learning of a neural network device for generating a verification vector for verifying a circuit design comprising a circuit block includes inputting a test vector to the circuit block, generating one or more rewards based on a coverage corresponding to the test vector, the coverage being determined based on a state transition of the circuit block based on the test vector, and applying the one or more rewards to a reinforcement learning.

Abstract: A display device includes a substrate having a pixel area and a peripheral area, a plurality of pixels disposed on the substrate in the pixel area, a plurality of data lines that supply a plurality of data signals to the pixels, a plurality of scan lines that supply a plurality of scan signals to the pixels, a plurality of power supply lines that supply a first voltage to the pixels, and first through third insulating layers. The first insulating layer is disposed on the substrate, the second insulating layer is disposed on the first insulating layer, and the third insulating layer is disposed on the second insulating layer. The scan lines are disposed below the third insulating layer on the substrate in the pixel area, and are disposed on the third insulating layer in the peripheral area.

Abstract: A method of reinforcement learning of a neural network device for generating a verification vector for verifying a circuit design comprising a circuit block includes inputting a test vector to the circuit block, generating one or more rewards based on a coverage corresponding to the test vector, the coverage being determined based on a state transition of the circuit block based on the test vector, and applying the one or more rewards to a reinforcement learning.

Abstract: A memory power control command may be received from a host and may include either a first power control command or a second power control command. The first power control command may correspond to the host not using a memory device, and the second power control command may correspond to the host using the memory device. It may be determined whether to activate a memory processor based on the memory power control command and on memory processor activation information. When the memory processor is activated based on the determining, an operation of the memory processor may be started based on the first power control command or ended based on the second power control command. When the memory processor is inactivated based on the determining, it may be determined whether to activate or inactivate the memory based on the memory power control command.

Abstract: Disclosed herein is a cosmetic composition including novel cell penetrating peptides, cell penetrating botulinum toxin recombinant proteins in which the cell-penetrating peptide and botulinum toxin are fused, polynucleotides encoding the cell penetrating botulinum toxin recombinant proteins, recombinant expression vector comprising the polynucleotides, and the cell penetrating botulinum toxin recombinant protein as active ingredients.

Abstract: Disclosed is a method and apparatus of operating a neural network. The neural network operation method includes receiving data for the neural network operation, verifying whether competition occurs between a first data traversal path corresponding to a first operation device and a second data traversal path corresponding to a second operation device, determining first operand data and second operand data from among the data using a result of the verifying and a priority between the first data traversal path and the second data traversal path, and performing the neural network operation based on the first operand data and the second operand data.

Abstract: A method of reinforcement learning of a neural network device for generating a verification vector for verifying a circuit design comprising a circuit block includes inputting a test vector to the circuit block, generating one or more rewards based on a coverage corresponding to the test vector, the coverage being determined based on a state transition of the circuit block based on the test vector, and applying the one or more rewards to a reinforcement learning.

Abstract: A computing method and device with data sharing re provided. The method includes loading, by a loader, input data of an input feature map stored in a memory in loading units according to a loading order, storing, by a buffer controller, the loaded input data in a reuse buffer of an address rotationally allocated according to the loading order, and transmitting, by each of a plurality of senders, to an executer respective input data corresponding to each output data of respective convolution operations among the input data stored in the reuse buffer, wherein portions of the transmitted respective input data overlap other.

Abstract: A neural network device includes: a memory configured to store a first feature map and a second feature map; and a neural network processor configured to operate a neural network, and comprising: a fetcher configured to fetch input data from the first feature map of the memory; a buffer configured to store the input data; an operator configured to generate output data by performing a convolution operation between the input data and a kernel; a writer configured to write the output data in the second feature map of the memory; and a controller configured to control the fetcher to fetch the input data and control the writer to write the output data, according to one or more intervals and one or more offsets determined based on a dilation rate of the kernel in multiple steps.

Abstract: A device for verifying a circuit design including a first circuit block and a second circuit block includes a verification vector generator and a design verifier. The verification vector generator determines a first verification vector by performing reinforcement learning through neural network computation based on a coverage corresponding to a first test vector, the coverage being determined based on a state transition of the first circuit block generated by inputting the first test vector to the first circuit block. The design verifier performs design verification for the first circuit block by using the first verification vector.

Abstract: Disclosed herein is a recombinant protein including botulinum toxin and cell penetrating peptides and cosmetic composition. The cell penetrating peptide according to the present disclosure may be actively used as a topical agent for various disease treatment, aesthetic, or cosmetic purposes, especially for a cosmetic composition, by securing better convenience as well as maximizing the intrinsic in vivo efficacy of the botulinum toxin through the cell penetrating recombinant proteins that combines the botulinum toxin and a cell penetrating peptide by making skin penetration and/or cell penetration for botulinum toxin more efficient.

Abstract: A system verification method includes generating a first verification vector as a result of a first action of an agent, the first verification vector referring to an observation corresponding to at least one state already covered, from among states of elements of a target system, identifying a first coverage corresponding to at least one state covered by the first verification vector, from among the states of the elements, updating the observation by reflecting the first coverage in the observation, and generating a second verification vector through a second action of the agent, the second verification vector referring to the updated observation.

Abstract: A device for verifying a circuit design including a first circuit block and a second circuit block includes a verification vector generator and a design verifier. The verification vector generator determines a first verification vector by performing reinforcement learning through neural network computation based on a coverage corresponding to a first test vector, the coverage being determined based on a state transition of the first circuit block generated by inputting the first test vector to the first circuit block. The design verifier performs design verification for the first circuit block by using the first verification vector.

Abstract: An organic light emitting display apparatus includes a substrate, a light conversion layer on the substrate, the light conversion layer including an oxide semiconductor, a passivation layer covering the light conversion layer, a first electrode on the passivation layer, an intermediate layer on the first electrode, the intermediate layer including an organic emission layer, and a second electrode on the intermediate layer.

Abstract: An organic light emitting display apparatus includes a substrate, a light conversion layer on the substrate, the light conversion layer including an oxide semiconductor, a passivation layer covering the light conversion layer, a first electrode on the passivation layer, an intermediate layer on the first electrode, the intermediate layer including an organic emission layer, and a second electrode on the intermediate layer.

Abstract: An organic light emitting display apparatus includes a substrate, a light conversion layer on the substrate, the light conversion layer including an oxide semiconductor, a passivation layer covering the light conversion layer, a first electrode on the passivation layer, an intermediate layer on the first electrode, the intermediate layer including an organic emission layer, and a second electrode on the intermediate layer.

Abstract: A method of operating a memory system includes the operations of outputting dirty cache lines from a data cache to a volatile memory device as instructions are executed, and outputting from the volatile memory device to a non-volatile memory device as many dirty cache lines as the size of a page of the non-volatile memory.

Abstract: An organic light-emitting display is disclosed. In one embodiment, the display includes i) a substrate, ii) a thin film transistor formed on the substrate, and comprising i) a gate electrode, ii) an active layer electrically insulated from the gate electrode, and iii) source and drain electrodes that are electrically connected to the active layer and iii) a first electrode electrically connected to the thin film transistor. The display further includes an intermediate layer formed on the first electrode and comprising an organic emission layer and a second electrode formed on the intermediate layer, wherein the source electrode or the drain electrode has an optical blocking portion extending in the direction of substrate thickness.

Abstract: An organic light-emitting display is disclosed. In one embodiment, the display includes i) a substrate, ii) a thin film transistor formed on the substrate, and comprising i) a gate electrode, ii) an active layer electrically insulated from the gate electrode, and iii) source and drain electrodes that are electrically connected to the active layer and iii) a first electrode electrically connected to the thin film transistor. The display further includes an intermediate layer formed on the first electrode and comprising an organic emission layer and a second electrode formed on the intermediate layer, wherein the source electrode or the drain electrode has an optical blocking portion extending in the direction of substrate thickness.