Patents by Inventor Hyung-soon Shin

Hyung-soon Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9135959
    Abstract: A magnetic random access memory includes multiple gate lines that are divided into a first gate line group and a second gate line group and arranged to be parallel to one another; multiple magnetic random access memory cells that are bonded to the gate lines in a direction intersected with the gate lines, respectively; multiple source lines that are bonded to one ends of switching devices included in the magnetic random access memory cells and arranged to be parallel to one another; and multiple bit lines that are bonded to one ends of magnetic tunnel junction devices included in the magnetic random access memory cells and arranged to be parallel to one another.
    Type: Grant
    Filed: April 9, 2013
    Date of Patent: September 15, 2015
    Assignee: EWHA UNIVERSITY-INDUSTRY COLLABORATION FOUNDATION
    Inventor: Hyung Soon Shin
  • Patent number: 8742855
    Abstract: Disclosed herein is a feed-forward ring oscillator. The feed-forward ring oscillator includes a plurality of delay cells for receiving a first differential input signal pair and a second differential input signal pair, and outputting a differential output signal pair. The delay cells are connected in a ring shape. Each of the delay cells receives a differential output signal pair of a delay cell of a previous stage as a first differential input signal pair and receives a differential output signal pair of a delay cell of a stage before the previous stage as a second differential input signal pair. Each of the delay cells comprises multiple independent gate field-effect transistors.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: June 3, 2014
    Assignee: EWHA University-Industry Collaboration Foundation
    Inventors: Hyung Soon Shin, Sung Min Park, Na Rae Jeong, Ji Sook Yun, Yu Jin Kim
  • Patent number: 8320152
    Abstract: An information storage device includes a storage node, a write unit configured to write information to a first magnetic domain region of the storage node, and a read unit configured to read information from a second magnetic domain region of the storage node. The information storage device further includes a temporary storage unit configured to temporarily store information read by the read unit, and a write control unit electrically connected to the temporary storage unit and configured to control current supplied to the write unit. The information read from the second magnetic domain region is stored in the temporary storage unit and written to the first magnetic domain region.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: November 27, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-jin Cho, Hyung-soon Shin, Seung-jun Lee, Sun-ae Seo, Sung-chul Lee, Ji-young Bae
  • Patent number: 8320166
    Abstract: A magnetic random access memory (MRAM) includes a memory cell having a first transistor and a first magnetic tunneling junction (MTJ) layer, and a reference cell operable as a basis when reading data stored in the memory cell, the reference cell including second and third MTJ layers arranged in parallel to each other, and a second transistor connected in series to each of the second and third MTJ layers, the second transistor having a driving capability corresponding to twice a driving capability of the first transistor of the memory cell.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: November 27, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wan-jun Park, Tae-wan Kim, Sang-jin Park, Dae-jeong Kim, Seung-jun Lee, Hyung-soon Shin
  • Patent number: 8194439
    Abstract: A spin transfer torque magnetic random access memory (STT-MRAM) and includes: a memory cell and a reference cell configured to operate as a reference when data stored in the memory cell is read. The memory cell includes: a first magnetic tunneling junction (MTJ) element and a first transistor connected to the first MTJ element. The reference cell includes: second and third MTJ elements connected in parallel; and second and third transistors that are connected to the second and third MTJ elements, respectively. The STT-MRAM further includes a control circuit having a write circuit configured to supply write currents having opposite directions to the second and third MTJ elements.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: June 5, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-seok Kim, Hyung-soon Shin, Seung-jun Lee
  • Publication number: 20120098605
    Abstract: Disclosed herein is a feed-forward ring oscillator. The feed-forward ring oscillator includes a plurality of delay cells for receiving a first differential input signal pair and a second differential input signal pair, and outputting a differential output signal pair. The delay cells are connected in a ring shape. Each of the delay cells receives a differential output signal pair of a delay cell of a previous stage as a first differential input signal pair and receives a differential output signal pair of a delay cell of a stage before the previous stage as a second differential input signal pair. Each of the delay cells comprises multiple independent gate field-effect transistors.
    Type: Application
    Filed: December 28, 2009
    Publication date: April 26, 2012
    Applicant: EWHA UNIVERSITY-INDUSTRY COLLABORATION FOUNDATION
    Inventors: Hyung Soon Shin, Sung Min Park, Na Rae Jeong, Ji Sook Yun, Yu Jin Kim
  • Patent number: 8144504
    Abstract: Provided is a method of operating a magnetic random access memory device comprising a switch structure and a magnetoresistance structure. According to the method, current variation depending on the direction of the current can be reduced by controlling a gate voltage of the switch structure when supplying current to write data to the magnetoresistance structure.
    Type: Grant
    Filed: July 10, 2009
    Date of Patent: March 27, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-seok Kim, Sun-ae Seo, Kee-won Kim, In-jun Hwang, Hyung-soon Shin, Seung-yeon Lee, Seung-jun Lee
  • Patent number: 8144503
    Abstract: An information storage device includes a memory region having a magnetic track and a write/read unit, and a control circuit connected to the memory region. First and second switching devices are connected to both ends of the magnetic track, and a third switching device is connected to the write/read unit. The control circuit controls the first to third switching devices, and supplies operating current to at least one of the magnetic track and the write/read unit.
    Type: Grant
    Filed: June 25, 2009
    Date of Patent: March 27, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-chul Lee, Sun-ae Seo, Young-jin Cho, Ji-young Bae, Ung-hwan Pi, Hyung-soon Shin, Seung-jun Lee
  • Patent number: 8045371
    Abstract: An information storage device includes a magnetic structure having a buffer track and a plurality of storage tracks connected to the buffer track. A write/read unit is disposed on the magnetic structure, and a plurality of switching devices are respectively connected to the buffer track, the plurality of storage tracks, and the write/read unit. The switching devices that are respectively connected to the buffer track and the storage tracks. The information storage device further includes a circuit configured to supply current to at least one of the magnetic structure and the write/read unit.
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: October 25, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-chul Lee, Hyung-soon Shin, Seung-jun Lee, Sun-ae Seo, Young-jin Cho, Ung-hwan Pl, Ji-young Bae, Jin-seong Heo
  • Publication number: 20110157971
    Abstract: A spin transfer torque magnetic random access memory (STT-MRAM) and includes: a memory cell and a reference cell configured to operate as a reference when data stored in the memory cell is read. The memory cell includes: a first magnetic tunneling junction (MTJ) element and a first transistor connected to the first MTJ element. The reference cell includes: second and third MTJ elements connected in parallel; and second and third transistors that are connected to the second and third MTJ elements, respectively. The STT-MRAM further includes a control circuit having a write circuit configured to supply write currents having opposite directions to the second and third MTJ elements.
    Type: Application
    Filed: September 17, 2010
    Publication date: June 30, 2011
    Inventors: Kwang-seok Kim, Hyung-soon Shin, Seung-jun Lee
  • Publication number: 20100232055
    Abstract: An information storage device includes a magnetic structure having a buffer track and a plurality of storage tracks connected to the buffer track. A write/read unit is disposed on the magnetic structure, and a plurality of switching devices are respectively connected to the buffer track, the plurality of storage tracks, and the write/read unit. The switching devices that are respectively connected to the buffer track and the storage tracks. The information storage device further includes a circuit configured to supply current to at least one of the magnetic structure and the write/read unit.
    Type: Application
    Filed: October 13, 2009
    Publication date: September 16, 2010
    Inventors: Sung-chul Lee, Hyung-soon Shin, Seung-jun Lee, Sun-ae Seo, Young-jin Cho, Ung-hwan Pi, Ji-young Bae, Jin-seong Heo
  • Patent number: 7755930
    Abstract: Provided are a semiconductor memory device and a magneto-logic circuit which change the direction of a magnetically induced current according to a logical combination of logic states of a plurality of input values. The semiconductor memory device comprises a current driving circuit, a magnetic induction layer, and a resistance-variable element. The current driving circuit receives a plurality of input values and changes the direction of a magnetically induced current according to a logical combination of logic states of the input values. The magnetic induction layer induces magnetism having a direction varying according to the direction of the magnetically induced current. The resistance-variable element has a resistance varying according to the direction of the magnetism induced by the magnetic induction layer.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: July 13, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kee-won Kim, Young-jin Cho, Hyung-soon Shin, Sung-hoon Choa, Seung-jun Lee, In-jun Hwang
  • Publication number: 20100157663
    Abstract: An information storage device includes a memory region having a magnetic track and a write/read unit, and a control circuit connected to the memory region. First and second switching devices are connected to both ends of the magnetic track, and a third switching device is connected to the write/read unit. The control circuit controls the first to third switching devices, and supplies operating current to at least one of the magnetic track and the write/read unit.
    Type: Application
    Filed: June 25, 2009
    Publication date: June 24, 2010
    Inventors: Sung-chul Lee, Sun-ae Seo, Young-jin Cho, Ji-young Bae, Ung-hwan Pi, Hyung-soon Shin, Seung-jun Lee
  • Patent number: 7672154
    Abstract: Provided are a semiconductor memory device and a method of programming the same. The semiconductor memory device includes a mode input value generating unit and a logic operating unit. The mode input value generating unit changes a connection state between input values of a current driving circuit so as to correspond to each of at least two operating modes, and defines a logic function of a magnetic memory cell connected to the current driving circuit in response to each operating mode. The logic operating unit performs a logic operation on the logic functions of at least two magnetic memory cells defined according to each of the operating modes and generates a result of logic operation.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: March 2, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-jun Hwang, Hyung-soon Shin, Seung-jun Lee, Sun-ae Seo, Kee-won Kim, Kwang-seok Kim
  • Publication number: 20100008130
    Abstract: Provided is a method of operating a magnetic random access memory device comprising a switch structure and a magnetoresistance structure. According to the method, current variation depending on the direction of the current can be reduced by controlling a gate voltage of the switch structure when supplying current to write data to the magnetoresistance structure.
    Type: Application
    Filed: July 10, 2009
    Publication date: January 14, 2010
    Inventors: Kwang-seok Kim, Sun-ae Seo, Kee-won Kim, In-jun Hwang, Hyung-soon Shin, Seung-yeon Lee, Seung-jun Lee
  • Publication number: 20100008135
    Abstract: An information storage device includes a storage node, a write unit configured to write information to a first magnetic domain region of the storage node, and a read unit configured to read information from a second magnetic domain region of the storage node. The information storage device further includes a temporary storage unit configured to temporarily store information read by the read unit, and a write control unit electrically connected to the temporary storage unit and configured to control current supplied to the write unit. The information read from the second magnetic domain region is stored in the temporary storage unit and written to the first magnetic domain region.
    Type: Application
    Filed: April 22, 2009
    Publication date: January 14, 2010
    Inventors: Young-jin Cho, Hyung-soon Shin, Seung-jun Lee, Sun-ae Seo, Sung-chul Lee, Ji-Young Bae
  • Publication number: 20090122596
    Abstract: Provided are a semiconductor memory device and a method of programming the same. The semiconductor memory device includes a mode input value generating unit and a logic operating unit. The mode input value generating unit changes a connection state between input values of a current driving circuit so as to correspond to each of at least two operating modes, and defines a logic function of a magnetic memory cell connected to the current driving circuit in response to each operating mode. The logic operating unit performs a logic operation on the logic functions of at least two magnetic memory cells defined according to each of the operating modes and generates a result of logic operation.
    Type: Application
    Filed: March 7, 2008
    Publication date: May 14, 2009
    Inventors: In-Jun Hwang, Hyung-soon Shin, Seung-Jun Lee, Sun-ae Seo, Kee-won Kim, Kwang-seok Kim
  • Publication number: 20090067233
    Abstract: A magnetic random access memory (MRAM) includes a memory cell having a first transistor and a first magnetic tunneling junction (MTJ) layer, and a reference cell operable as a basis when reading data stored in the memory cell, the reference cell including second and third MTJ layers arranged in parallel to each other, and a second transistor connected in series to each of the second and third MTJ layers, the second transistor having a driving capability corresponding to twice a driving capability of the first transistor of the memory cell.
    Type: Application
    Filed: September 5, 2008
    Publication date: March 12, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Wan-jun Park, Tae-wan Kim, Sang-jin Park, Dae-jeong Kim, Seung-jun Lee, Hyung-soon Shin
  • Patent number: 7439770
    Abstract: MTJ cell based logic circuits and MTJ cell drivers having improved operating speeds compared to the conventional art, and operating methods thereof are described.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: October 21, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-wan Kim, Kee-won Kim, Hyung-soon Shin, Seung-jun Lee, In-jun Hwang, Young-jin Cho
  • Publication number: 20080219045
    Abstract: Provided are a semiconductor memory device and a magneto-logic circuit which change the direction of a magnetically induced current according to a logical combination of logic states of a plurality of input values. The semiconductor memory device comprises a current driving circuit, a magnetic induction layer, and a resistance-variable element. The current driving circuit receives a plurality of input values and changes the direction of a magnetically induced current according to a logical combination of logic states of the input values. The magnetic induction layer induces magnetism having a direction varying according to the direction of the magnetically induced current. The resistance-variable element has a resistance varying according to the direction of the magnetism induced by the magnetic induction layer.
    Type: Application
    Filed: October 19, 2007
    Publication date: September 11, 2008
    Inventors: Kee-won Kim, Young-jin Cho, Hyung-soon Shin, Sung-hoon Choa, Seung-jun Lee, In-jun Hwang