Patents by Inventor Hyung-suk Jung

Hyung-suk Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10395972
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes: a deep trench in a substrate; a sidewall insulating film on a side surface of the deep trench; an interlayer insulating film on the sidewall insulating film; and an air gap in the interlayer insulating film.
    Type: Grant
    Filed: January 16, 2018
    Date of Patent: August 27, 2019
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Da Soon Lee, Hyung Suk Choi, Jeong Gyu Park, Gil Ho Lee, Hyun Tae Jung, Meng An Jung, Woo Sig Min, Pil Seung Kang
  • Publication number: 20190189767
    Abstract: A semiconductor device includes active regions on a semiconductor substrate, gate structures on separate, respective active regions, and source/drain regions in the semiconductor substrate on opposite sides of separate, respective gate structures. Each separate gate structure includes a sequential stack of a high dielectric layer, a first work function metal layer, a second work function metal layer having a lower work function than the first work function metal layer, and a gate metal layer. First work function metal layers of the gate structures have different thicknesses, such that the gate structures include a largest gate structure where the first work function metal layer of the largest gate structure has a largest thickness of the first work function metal layers. The largest gate structure includes a capping layer on the high dielectric layer of the largest gate structure, where the capping layer includes one or more impurity elements.
    Type: Application
    Filed: July 23, 2018
    Publication date: June 20, 2019
    Applicant: Sumsung Electronics Co., Ltd.
    Inventors: Jae-yeol SONG, Wan-don Kim, Su-young Bae, Dong-soo Lee, Jong-han Lee, Hyung-suk Jung, Sang-jin Hyun
  • Patent number: 10319956
    Abstract: The present invention relates to a pouch case for a secondary battery and a pouch-type secondary battery comprising the same. More particularly, it relates to a pouch case for a secondary battery comprising an inner resin layer, a metal layer and an outer resin layer, wherein the inner resin layer comprises a porous non-woven fabric support having a plurality of pores and a polymer sealant filled in the pores of the non-woven fabric support; and a secondary battery comprising the same.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: June 11, 2019
    Assignee: LG CHEM, LTD.
    Inventors: Hyung Kyun Yu, Sang Hun Kim, Won Pill Hwang, Soo Ji Hwang, Sang Suk Jung
  • Publication number: 20190157410
    Abstract: A semiconductor device includes a substrate having a first region and a second region, a first transistor formed in the first region and formed by a first gate line including a first lower metal-containing layer and a first upper metal-containing layer, and a second transistor formed in the second region and formed by a second gate line having an equal width to that of the first gate line and including a second lower metal-containing layer and a second upper metal-containing layer on the second upper metal-containing layer, wherein each of an uppermost end of the first upper metal-containing layer and an uppermost end of the second lower metal-containing layer has a higher level than an uppermost end of the first lower metal-containing layer.
    Type: Application
    Filed: July 9, 2018
    Publication date: May 23, 2019
    Inventors: Jeong-Hyuk Yim, Wan-Don KIM, Jong-Han LEE, Hyung-Suk JUNG, Sang-Jin HYUN
  • Patent number: 10299124
    Abstract: Disclosed is a 5G or pre-5G communication system for supporting a data transmission rate higher than that of a 4G communication system such as LTE. Disclosed is a method for providing a data service in a global virtual network provider of a wireless communication system, comprising the steps of: determining a wireless network for providing a data service on the basis of at least one of a service type, service quality, and price information required by a user; and transmitting, to a terminal, wireless network information including the determined wireless network, wherein the terminal and the determined wireless network are temporarily connected before the wireless network is determined.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: May 21, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Suk Kweon, Ji-Cheol Lee, Hyung-Ho Lee, Ha-Kyung Jung
  • Publication number: 20190097048
    Abstract: A semiconductor device including a substrate; a first and second active region on the substrate; a first recess intersecting with the first active region; a second recess intersecting with the second active region; a gate spacer extending along sidewalls of the first and second recess; a first lower high-k dielectric film in the first recess and including a first high-k dielectric material in a first concentration and a second high-k dielectric material; a second lower high-k dielectric film in the second recess and including the first high-k dielectric material in a second concentration that is greater than the first concentration, and the second high-k dielectric material; a first metal-containing film on the first lower high-k dielectric film and including silicon in a third concentration; and a second metal-containing film on the second lower high-k dielectric film and including silicon in a fourth concentration that is smaller than the third concentration.
    Type: Application
    Filed: May 9, 2018
    Publication date: March 28, 2019
    Inventors: Jae Yeol SONG, Su Young BAE, Dong Soo LEE, Hyung Suk JUNG, Sang Jin HYUN
  • Patent number: 9793399
    Abstract: A semiconductor device includes a stressor and an insulating pattern. A device isolation layer is formed to define an active area on a substrate. A first gate electrode is formed on the active area. A second gate electrode is formed on the device isolation layer. A trench is formed in the active area between the first gate electrode and the second gate electrode. A stressor is formed in the trench. A cavity formed between the stressor and the device isolation layer and adjacent to the second gate electrode is disposed. An insulating pattern is formed in the cavity.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: October 17, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pan-Kwi Park, Koung-Min Ryu, Moon-Han Park, Hyung-suk Jung, Jong-hoon Baek, Su-Young Choi
  • Patent number: 9318335
    Abstract: A method of fabricating a semiconductor device includes forming an interface layer on a substrate, forming a first gate insulating layer having a first dielectric constant on the interface layer, forming a second gate insulating layer having a second dielectric constant smaller than the first dielectric constant on the first gate insulating layer, annealing the substrate, nitriding a resultant of the annealed first and second gate insulating layers to form a nitrided gate insulator, forming a work function control layer on the nitride gate insulator, and forming a metal gate electrode on the work function control layer. At least one of the work function control layer and the metal gate electrode is of or includes aluminum (Al).
    Type: Grant
    Filed: April 14, 2015
    Date of Patent: April 19, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Weon-Hong Kim, Moon-Kyun Song, Min-Joo Lee, Hyung-Suk Jung
  • Publication number: 20160064225
    Abstract: A method of fabricating a semiconductor device includes forming an interface layer on a substrate, forming a first gate insulating layer having a first dielectric constant on the interface layer, forming a second gate insulating layer having a second dielectric constant smaller than the first dielectric constant on the first gate insulating layer, annealing the substrate, nitriding a resultant of the annealed first and second gate insulating layers to form a nitrided gate insulator, forming a work function control layer on the nitride gate insulator, and forming a metal gate electrode on the work function control layer. At least one of the work function control layer and the metal gate electrode is of or includes aluminum (Al).
    Type: Application
    Filed: April 14, 2015
    Publication date: March 3, 2016
    Inventors: WEON-HONG KIM, MOON-KYUN SONG, MIN-JOO LEE, HYUNG-SUK JUNG
  • Publication number: 20160020324
    Abstract: A semiconductor device includes a stressor and an insulating pattern. A device isolation layer is formed to define an active area on a substrate. A first gate electrode is formed on the active area. A second gate electrode is formed on the device isolation layer. A trench is formed in the active area between the first gate electrode and the second gate electrode. A stressor is formed in the trench. A cavity formed between the stressor and the device isolation layer and adjacent to the second gate electrode is disposed. An insulating pattern is formed in the cavity.
    Type: Application
    Filed: December 17, 2014
    Publication date: January 21, 2016
    Inventors: Pan-Kwi Park, Koung-Min Ryu, Moon-Han Park, Hyung-suk Jung, Jong-hoon Baek, Su-Young Choi
  • Patent number: 9218977
    Abstract: A fabricating method of a semiconductor device includes stacking a high-k dielectric film not containing silicon (Si) and an insulating film containing silicon (Si) on a substrate, and diffusing Si contained in the insulating film into the high-k dielectric film by annealing the substrate having the high-k dielectric film and the insulating film stacked thereon.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: December 22, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seok-Jun Won, Weon-Hong Kim, Moon-Kyun Song, Hyung-Suk Jung
  • Publication number: 20150162201
    Abstract: In a method of manufacturing a semiconductor device, a dummy gate structure including a dummy gate electrode and a gate mask sequentially stacked on a substrate is formed. A spacer is formed on a sidewall of the dummy gate structure. The gate mask is formed to expose the dummy gate electrode and to form a recess on the spacer. A capping layer pattern is formed to fill the recess in the spacer. The exposed dummy gate electrode is replaced with a gate electrode.
    Type: Application
    Filed: September 4, 2014
    Publication date: June 11, 2015
    Inventors: In-Hee Lee, Min-Woo Song, Seok-Jun Won, Hyung-Suk Jung
  • Patent number: 9035398
    Abstract: A semiconductor device includes an interlayer insulating film on a substrate, the interlayer insulating film including a trench, a gate insulating film in the trench, a diffusion film on the gate insulating film, the diffusion film including a first diffusion material, a gate metal structure on the diffusion film, the gate metal structure including a second diffusion material, and a diffusion prevention film between the gate metal structure and the diffusion film, the diffusion prevention film being configured to prevent diffusion of the second diffusion material from the gate metal structure, the first diffusion material diffused from the diffusion film exists in the gate insulating film.
    Type: Grant
    Filed: August 27, 2013
    Date of Patent: May 19, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seok-Jun Won, Suk-Hoon Kim, Hyung-Suk Jung
  • Patent number: 9034714
    Abstract: A method of fabricating a semiconductor device includes providing a dummy gate insulation film formed on a substrate, the dummy gate insulation film including a first material and providing a spacer formed at least one side of the gate insulation film, the spacer including the first material, removing the first material included in the dummy gate insulation film by a first process, removing the dummy gate insulation film from which the first material has been removed by a second process different from the first process, and sequentially forming a gate insulation film and a gate electrode structure on the substrate.
    Type: Grant
    Filed: August 27, 2013
    Date of Patent: May 19, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seok-Jun Won, Hyung-Suk Jung
  • Patent number: 8970014
    Abstract: Semiconductor devices and methods of forming the semiconductor device are provided, the semiconductor devices including a first dielectric layer on a substrate, and a second dielectric layer on the first dielectric layer. The first dielectric layer has a carbon concentration lower than the second dielectric layer.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: March 3, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ha-jin Lim, Hyung-Suk Jung, Yun-Ki Choi
  • Publication number: 20140113443
    Abstract: A fabricating method of a semiconductor device includes stacking a high-k dielectric film not containing silicon (Si) and an insulating film containing silicon (Si) on a substrate, and diffusing Si contained in the insulating film into the high-k dielectric film by annealing the substrate having the high-k dielectric film and the insulating film stacked thereon.
    Type: Application
    Filed: August 30, 2013
    Publication date: April 24, 2014
    Applicant: SUMSUNG ELECTRONICS CO., LTD.
    Inventors: Seok-Jun WON, Weon-Hong KIM, Moon-Kyun SONG, Hyung-Suk JUNG
  • Publication number: 20140077281
    Abstract: A semiconductor device includes an interlayer insulating film on a substrate, the interlayer insulating film including a trench, a gate insulating film in the trench, a diffusion film on the gate insulating film, the diffusion film including a first diffusion material, a gate metal structure on the diffusion film, the gate metal structure including a second diffusion material, and a diffusion prevention film between the gate metal structure and the diffusion film, the diffusion prevention film being configured to prevent diffusion of the second diffusion material from the gate metal structure, the first diffusion material diffused from the diffusion film exists in the gate insulating film.
    Type: Application
    Filed: August 27, 2013
    Publication date: March 20, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seok-Jun WON, Suk-Hoon KIM, Hyung-Suk JUNG
  • Publication number: 20140073103
    Abstract: A method of fabricating a semiconductor device includes providing a dummy gate insulation film formed on a substrate, the dummy gate insulation film including a first material and providing a spacer formed at least one side of the gate insulation film, the spacer including the first material, removing the first material included in the dummy gate insulation film by a first process, removing the dummy gate insulation film from which the first material has been removed by a second process different from the first process, and sequentially forming a gate insulation film and a gate electrode structure on the substrate.
    Type: Application
    Filed: August 27, 2013
    Publication date: March 13, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seok-Jun WON, Hyung-Suk JUNG
  • Publication number: 20140001606
    Abstract: Semiconductor devices and methods of forming the semiconductor device are provided, the semiconductor devices including a first dielectric layer on a substrate, and a second dielectric layer on the first dielectric layer. The first dielectric layer has a carbon concentration lower than the second dielectric layer.
    Type: Application
    Filed: September 6, 2013
    Publication date: January 2, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ha-jin LIM, Hyung-Suk JUNG, Yun-Ki CHOI
  • Patent number: 8557713
    Abstract: Semiconductor devices and methods of forming the semiconductor device are provided, the semiconductor devices including a first dielectric layer on a substrate, and a second dielectric layer on the first dielectric layer. The first dielectric layer has a carbon concentration lower than the second dielectric layer.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: October 15, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ha-Jin Lim, Hyung-Suk Jung, Yun-Ki Choi