Abstract: A semiconductor chip package assembly includes a package substrate having a chip mounting surface; a plurality of solder pads disposed on the chip mounting surface; a first dummy pad and a second dummy pad spaced apart from the first dummy pad disposed on the chip mounting surface; a solder mask on the chip mounting surface and partially covering the solder pads, the first dummy pad, and the second dummy pad; a chip package mounted on the chip mounting surface and electrically connected to the package substrate through a plurality of solder balls on respective said solder pads; a discrete device having a first terminal and a second terminal disposed between the chip package and the package substrate; a first solder connecting the first terminal with the first dummy pad and the chip package; and a second solder connecting the second terminal with the second dummy pad and the chip package.

Abstract: A semiconductor package structure including a first semiconductor package is provided. The first semiconductor package includes a first semiconductor package including a first redistribution layer (RDL) structure having a first surface and a second surface opposite thereto. A first semiconductor die and a first molding compound that surrounds the first semiconductor die are disposed on the first surface of the first RDL structure. An IMD structure having a conductive layer with an antenna pattern or a conductive shielding layer is disposed on the first molding compound and the first semiconductor die.

Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first semiconductor package including a first semiconductor die. A first redistribution layer (RDL) structure is coupled to the first semiconductor die. The first redistribution layer (RDL) structure includes a first conductive trace disposed at a first layer-level. A second conductive trace is disposed at a second layer-level. A first inter-metal dielectric (IMD) layer and a second inter-metal dielectric (IMD) layer, which is beside the first inter-metal dielectric (IMD) layer, are disposed between the first conductive trace and the second conductive trace.

Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first semiconductor package including a first semiconductor die. A first redistribution layer (RDL) structure is coupled to the first semiconductor die. The first redistribution layer (RDL) structure includes a first conductive trace disposed at a first layer-level. A second conductive trace is disposed at a second layer-level. A first inter-metal dielectric (IMD) layer and a second inter-metal dielectric (IMD) layer, which is beside the first inter-metal dielectric (IMD) layer, are disposed between the first conductive trace and the second conductive trace.

Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a semiconductor die. A first molding compound covers a back surface of the semiconductor die. A redistribution layer (RDL) structure is disposed on a front surface of the semiconductor die. The semiconductor die is coupled to the RDL structure. A second molding compound is disposed on the front surface of the semiconductor die and embedded in the RDL structure. A passive device is disposed on the second molding compound and coupled to the semiconductor die.

Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first semiconductor package including a first semiconductor die. A first molding compound surrounds the first semiconductor die. A first redistribution layer (RDL) structure is disposed on a bottom surface of the first molding compound. The first semiconductor die is coupled to the first RDL structure. A second redistribution layer (RDL) structure is disposed on a top surface of the first molding compound. A passive device is coupled to the second RDL structure.

Abstract: In some embodiments, a semiconductor device includes a first die, a second die coupled to a first surface of the first die, and a third die coupled to the first surface of the first die. The semiconductor device further includes an underfill material disposed between the first die and the second die and between the first die and the third die. A first volume of the underfill material for the second die is different than a second volume of the underfill material for the third die.

Abstract: The invention provides a semiconductor package, a semiconductor package assembly and a method for fabricating a semiconductor package. The semiconductor package assembly includes a first semiconductor package. The first semiconductor package includes a first semiconductor die having first pads thereon. A first redistribution layer (RDL) structure is coupled to the first semiconductor die. Conductive pillar structures are disposed on a surface of the first RDL structure away from the first semiconductor die, wherein the conductive pillar structures are coupled to the first RDL structure.

Abstract: Semiconductor device packaging methods and structures thereof are disclosed. In one embodiment, a method of packaging semiconductor devices includes coupling a plurality of second dies to a top surface of a first die, and determining a distance between each of the plurality of second dies and the first die. The method also includes determining an amount of underfill material to dispose between the first die and each of the plurality of second dies based on the determined distance, and disposing the determined amount of the underfill material under each of the plurality of second dies.

Abstract: A display system is disclosed. The display system includes several electrical apparatuses and a display control unit. The display control unit builds connections with the electrical apparatuses. The display control unit includes an information generating module and a display driving module. When the display system is in a combination display mode, the information generating module detects and generates combination information about combination relations among the display units of the electrical apparatuses. The display driving module drives each of the display units to display a corresponding image block according to the combination information. Hence, the displayed corresponding image blocks can be combined to form an entire image. A display method is also disclosed.

Abstract: A wireless transmission system includes several candidate devices, a wireless transmission interface and a wireless transmission device. The wireless transmission device includes a storage unit, a transmission direction information generating unit and a processing unit. The processing unit receives the device information of each of the candidate devices from each of the candidate devices respectively through the wireless transmission interface. The processing unit calculates transmission direction range according to the transmission direction information, which is generated through the transmission direction information generating unit. The processing unit selects at least one of the candidate devices, which matches the transmission direction range. Wherein, the selected at least one candidate device is taken as at least one transmission target device.

Abstract: Semiconductor device packaging methods and structures thereof are disclosed. In one embodiment, a method of packaging semiconductor devices includes coupling a plurality of second dies to a top surface of a first die, and determining a distance between each of the plurality of second dies and the first die. The method also includes determining an amount of underfill material to dispose between the first die and each of the plurality of second dies based on the determined distance, and disposing the determined amount of the underfill material under each of the plurality of second dies.

Abstract: A display system is disclosed. The display system includes several electrical apparatuses and a display control unit. The display control unit builds connections with the electrical apparatuses. The display control unit includes an information generating module and a display driving module. When the display system is in a combination display mode, the information generating module detects and generates combination information about combination relations among the display units of the electrical apparatuses. The display driving module drives each of the display units to display a corresponding image block according to the combination information. Hence, the displayed corresponding image blocks can be combined to form an entire image. A display method is also disclosed.

Abstract: A data transmission system includes a mobile originated device and at least one cloud server. The mobile originated device obtains information of at least one datum to be transmitted. The mobile originated device builds connections with several candidate mobile devices through a first wireless data transmission interface, and selects at least one target mobile device from the candidate mobile devices. The mobile originated device obtains target-mobile-device information of the target mobile device through the first wireless data transmission interface. The mobile originated device transmits the target-mobile-device information and the information of the datum to be transmitted to the cloud server through a second wireless data transmission interface. The cloud server assists the mobile originated device to transmit the datum to be transmitted to the target mobile device according to the target-mobile-device information and the information of the datum to be transmitted.

Abstract: A wireless transmission system includes several candidate devices, a wireless transmission interface and a wireless transmission device. The wireless transmission device includes a storage unit, a transmission direction information generating unit -and a processing unit. The processing unit receives the device information of each of the candidate devices from each of the candidate devices respectively through the wireless transmission interface. The processing unit calculates transmission direction range according to the transmission direction information, which is generated through the transmission direction information generating unit. The processing unit selects at least one of the candidate devices, which matches the transmission direction range. Wherein, the selected at least one candidate device is taken as at least one transmission target device.

Abstract: A method of directly depositing a polysilicon film at a low temperature is disclosed. The method comprises providing a substrate and performing a sequential deposition process. The sequential deposition process comprises first and second deposition steps. In the first deposition step, a first bias voltage is applied to the substrate, and plasma chemical vapor deposition is utilized to form a first polysilicon sub-layer on the substrate. In the second deposition step, a second bias voltage is applied to the substrate, and plasma chemical vapor deposition is utilized to form a second polysilicon sub-layer on the first sub-layer. The first and second sub-layers constitute the polysilicon film, and the first bias voltage differs from the second bias voltage.

Abstract: This invention relates to a packaging structure and method of an image sensor module. The method comprises: providing a transparent substrate having a first patterned conductive layer; carrying an image sensor integrated circuit chip having a photosensitive active area and at least one passive chip on the transparent substrate, wherein the photosensitive active area faces the transparent substrate; forming an insulating build-up film over the transparent substrate; and forming a plurality of conductive vias in the insulating build-up film wherein the ends of the conductive vias are connected with the passive chip or the first patterned conductive layer of the transparent substrate while the other ends of the conductive vias are exposed on the surface of the insulating build-up film. The packaging method is capable of down-sizing the construction of the image sensor module and simplifying the processing steps.

Abstract: A low temperature poly-silicon thin film element, method of making poly-silicon thin film by direct deposition at low temperature, and the inductively-coupled plasma chemical vapor deposition equipment utilized, wherein the poly-silicon material is induced to crystallize into a poly-silicon thin film at low temperature by means of high density plasma and substrate bias voltage. Furthermore, the atom structure of the poly-silicon thin film is aligned in regular arrangement by making use of the induction layer having optimal orientation and lattice constant close to that of the silicon, thus raising the crystallization quality of the poly-silicon thin film and reducing the thickness of the incubation layer.

Abstract: A method for forming a polysilicon film in a plasma-assisted chemical vapor deposition (CVD) system including a chamber in which a first electrode and a second electrode spaced apart from the first electrode are provided comprises providing a substrate on the second electrode, the substrate including a surface exposed to the first electrode, applying a first power to the first electrode for generating a plasma in the chamber, applying a second power to the second electrode during a nucleation stage of the polysilicon film for ion bombarding the surface of the substrate, and flowing an erosive gas into the chamber.

Abstract: A method of directly depositing a polysilicon film at a low temperature is disclosed. The method comprises providing a substrate and performing a sequential deposition process. The sequential deposition process comprises first and second deposition steps. In the first deposition step, a first bias voltage is applied to the substrate, and plasma chemical vapor deposition is utilized to form a first polysilicon sub-layer on the substrate. In the second deposition step, a second bias voltage is applied to the substrate, and plasma chemical vapor deposition is utilized to form a second polysilicon sub-layer on the first sub-layer. The first and second sub-layers constitute the polysilicon film, and the first bias voltage differs from the second bias voltage.