Patents by Inventor Ikuko Kawamata
Ikuko Kawamata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20110017995Abstract: An object is to increase the aperture ratio of a semiconductor device. The semiconductor device includes a driver circuit portion and a display portion (also referred to as a pixel portion) over the same substrate. The driver circuit portion includes a channel-etched thin film transistor for a driver circuit, in which a source electrode and a drain electrode are formed using a metal and a channel layer is formed using an oxide semiconductor, and a driver circuit wiring formed using a metal. The display portion includes a channel protection thin film transistor for a pixel, in which a source electrode and a drain electrode are formed using an oxide conductor and a semiconductor layer is formed using an oxide semiconductor, and a display portion wiring formed using an oxide conductor. The thin film transistors provided in the semiconductor device are formed with a resist mask formed using a multi-tone mask.Type: ApplicationFiled: July 20, 2010Publication date: January 27, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Hiroyuki MIYAKE, Hideaki KUWABARA, Ikuko KAWAMATA
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Patent number: 7875931Abstract: In order to form a plurality of semiconductor elements over an insulating surface, in one continuous semiconductor layer, an element region serving as a semiconductor element and an element isolation region having a function to electrically isolate element regions from each other by repetition of PN junctions. The element isolation region is formed by selective addition of an impurity element of at least one or more kinds of oxygen, nitrogen, and carbon and an impurity element that imparts an opposite conductivity type to that of the adjacent element region in order to electrically isolate elements from each other in one continuous semiconductor layer.Type: GrantFiled: April 23, 2007Date of Patent: January 25, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai, Ikuko Kawamata
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Publication number: 20110012105Abstract: An object is to increase an aperture ratio of a semiconductor device. The semiconductor device includes a driver circuit portion and a display portion (also referred to as a pixel portion) over one substrate. The driver circuit portion includes a channel-etched thin film transistor for a driver circuit, in which a source electrode and a drain electrode are formed using metal and a channel layer is formed of an oxide semiconductor, and a driver circuit wiring formed using metal. The display portion includes a channel protection thin film transistor for a pixel, in which a source electrode layer and a drain electrode layer are formed using an oxide conductor and a semiconductor layer is formed of an oxide semiconductor, and a display portion wiring formed using an oxide conductor.Type: ApplicationFiled: July 13, 2010Publication date: January 20, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Hiroyuki MIYAKE, Hideaki KUWABARA, Ikuko KAWAMATA
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Patent number: 7867838Abstract: To provide a highly reliable semiconductor device and a method for manufacturing the semiconductor device, where defects such as a short between a gate electrode layer and a semiconductor layer and a leakage current, which would otherwise be caused due to a coverage defect of the semiconductor layer with an insulating layer, can be prevented. In order to form a plurality of semiconductor elements over an insulating surface, a semiconductor layer is not separated into a plurality of island-shape semiconductor layers, but instead, element isolation regions, which electrically insulate a plurality of element regions functioning as semiconductor elements, are formed in one semiconductor layer, i.e., a first element isolation region with high resistance and a second element isolation region which has a contact with the element region and has a conductivity type opposite to that of the source and drain regions of the element region.Type: GrantFiled: January 27, 2010Date of Patent: January 11, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Ikuko Kawamata, Yasuyuki Arai
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Publication number: 20100311222Abstract: When single crystal semiconductor layers are transposed from a single crystal semiconductor substrate (a bond wafer), the single crystal semiconductor substrate is etched selectively (this step is also referred to as groove processing), and a plurality of single crystal semiconductor layers, which are being divided in size of manufactured semiconductor elements, are transposed to a different substrate (a base substrate). Thus, a plurality of island-shaped single crystal semiconductor layers (SOI layers) can be formed over the base substrate. Further, etching is performed on the single crystal semiconductor layers formed over the base substrate, and the shapes of the SOI layers are controlled precisely by being processed and modified.Type: ApplicationFiled: August 18, 2010Publication date: December 9, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Ikuko KAWAMATA, Yasuyuki ARAI
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Patent number: 7846817Abstract: It is an object of the present invention to manufacture a semiconductor element and an integrated circuit that have high performance over a large-sized substrate with high throughput and high productivity. When single crystal semiconductor layers are transferred from a single crystal semiconductor substrate (a bond wafer), the single crystal semiconductor substrate is etched selectively (this step is also referred to as groove processing), and a plurality of single crystal semiconductor layers divided such that they have the size of semiconductor elements to be manufactured are transferred to a different substrate (a base substrate). Thus, a plurality of island-shaped single crystal semiconductor layers (SOI layers) can be formed over the base substrate.Type: GrantFiled: March 10, 2008Date of Patent: December 7, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Ikuko Kawamata, Yasuyuki Arai
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Publication number: 20100304515Abstract: A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device in high yield are proposed. In a display device including a channel stop thin film transistor with an inverted-staggered structure, the channel stop thin film transistor with the inverted-staggered structure includes a microcrystalline semiconductor film including a channel formation region. An impurity region including an impurity element imparting one conductivity type is formed as selected in a region in the channel formation region of the microcrystalline semiconductor film which does not overlap with a source electrode or a drain electrode. In the channel formation region, a non-doped region, to which the impurity element imparting one conductivity type is not added, is formed between the impurity region, which is a doped region to which the impurity element is added, and the source region or the drain region.Type: ApplicationFiled: July 23, 2010Publication date: December 2, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Satoshi KOBAYASHI, Ikuko KAWAMATA
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Publication number: 20100289026Abstract: When a conductive layer is formed, a first liquid composition containing a conductive material is applied on an outer side of a pattern that is desired to be formed (corresponding to a contour or an edge portion of a pattern), and a first conductive layer (insulating layer) having a frame-shape is formed. A second liquid composition containing a conductive material is applied so as to fill a space inside the first conductive layer having a frame-shape, whereby a second conductive layer is formed. The first conductive layer and the second conductive layer are formed so as to be in contact with each other, and the first conductive layer is formed so as to surround the second conductive layer. Therefore, the first conductive layer and the second conductive layer can be used as one continuous conductive layer.Type: ApplicationFiled: July 27, 2010Publication date: November 18, 2010Inventors: Shunpei Yamazaki, Hironobu Shoji, Ikuko Kawamata
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Publication number: 20100285624Abstract: A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device with high mass-productivity. In a display device including an inverted-staggered channel-stop-type thin film transistor, the inverted-staggered channel-stop-type thin film transistor includes a microcrystalline semiconductor film including a channel formation region, and an impurity region containing an impurity element of one conductivity type is selectively provided in a region which is not overlapped with source and drain electrodes, in the channel formation region of the microcrystalline semiconductor film.Type: ApplicationFiled: July 16, 2010Publication date: November 11, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Satoshi KOBAYASHI, Ikuko KAWAMATA, Koji DAIRIKI, Shigeki KOMORI, Toshiyuki ISA, Shunpei YAMAZAKI
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Publication number: 20100277448Abstract: The display device includes: a flexible display panel including a display portion in which scanning lines and signal lines cross each other; a supporting portion for supporting an end portion of the flexible display panel; a signal line driver circuit for outputting a signal to the signal line, which is provided for the supporting portion; and a scanning line driver circuit for outputting a signal to the scanning line, which is provided for a flexible surface of the display panel in a direction which is perpendicular or substantially perpendicular to the supporting portion.Type: ApplicationFiled: April 28, 2010Publication date: November 4, 2010Inventors: Satohiro Okamoto, Yasuyuki Arai, Ikuko Kawamata, Atsushi Miyaguchi, Yoshitaka Moriya
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Publication number: 20100277443Abstract: An e-book reader in which destruction of a driver circuit at the time when a flexible panel is handled is inhibited. In addition, an e-book reader having a simplified structure. A plurality of flexible display panels each including a display portion in which display control is performed by a scan line driver circuit and a signal line driver circuit, and a binding portion fastening the plurality of display panels together are included. The signal line driver circuit is provided inside the binding portion, and the scan line driver circuit is provided at the edge of the display panel in a direction perpendicular to the binding portion.Type: ApplicationFiled: April 28, 2010Publication date: November 4, 2010Inventors: Shunpei Yamazaki, Jun Koyama, Yasuyuki Arai, Ikuko Kawamata, Atsushi Miyaguchi, Yoshitaka Moriya
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Patent number: 7811884Abstract: When single crystal semiconductor layers are transposed from a single crystal semiconductor substrate (a bond wafer), the single crystal semiconductor substrate is etched selectively (this step is also referred to as groove processing), and a plurality of single crystal semiconductor layers, which are being divided in size of manufactured semiconductor elements, are transposed to a different substrate (a base substrate). Thus, a plurality of island-shaped single crystal semiconductor layers (SOI layers) can be formed over the base substrate. Further, etching is performed on the single crystal semiconductor layers formed over the base substrate, and the shapes of the SOI layers are controlled precisely by being processed and modified.Type: GrantFiled: January 25, 2010Date of Patent: October 12, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Ikuko Kawamata, Yasuyuki Arai
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Publication number: 20100237774Abstract: To reduce the thickness of a lighting device which uses an electroluminescent material and to simplify the structure of a lighting device which uses an electroluminescent material, in the lighting device of the present invention: a terminal electrically connecting a light-emitting element included in the lighting device to the outside is formed over the same surface of a substrate as the light-emitting element; and the terminal is formed at the center of the substrate while the light-emitting element is stacked. In addition, the lighting device has a structure in which the light-emitting element is not easily deteriorated.Type: ApplicationFiled: March 12, 2010Publication date: September 23, 2010Inventors: Shunpei Yamazaki, Yasuyuki Arai, Noriko Shibata, Yukie Suzuki, Yasuo Nakamura, Ikuko Kawamata, Yoshitaka Moriya
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Patent number: 7800113Abstract: The present invention provides a method for manufacturing a display device having a TFT that can be operated at high speed while using a small number of photomasks and improving the utilization efficiency of materials, where the threshold value is difficult to be varied. In the invention, a catalytic element is applied to an amorphous semiconductor film and the amorphous semiconductor film is heated to form a crystalline semiconductor film. After removing the catalytic element from the crystalline semiconductor film, a top-gate type thin film transistor with a planar structure is manufactured. Moreover, by using the droplet discharging method where an element of a display device is formed selectively, the process can be simplified, and loss of materials can be reduced.Type: GrantFiled: July 18, 2007Date of Patent: September 21, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hironobu Shoji, Shinji Maekawa, Kensuke Yoshizumi, Tatsuya Honda, Yukie Suzuki, Ikuko Kawamata, Shunpei Yamazaki
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Patent number: 7791075Abstract: A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device in high yield are proposed. In a display device including a channel stop thin film transistor with an inverted-staggered structure, the channel stop thin film transistor with the inverted-staggered structure includes a microcrystalline semiconductor film including a channel formation region. An impurity region including an impurity element imparting one conductivity type is formed as selected in a region in the channel formation region of the microcrystalline semiconductor film which does not overlap with a source electrode or a drain electrode. In the channel formation region, a non-doped region, to which the impurity element imparting one conductivity type is not added, is formed between the impurity region, which is a doped region to which the impurity element is added, and the source region or the drain region.Type: GrantFiled: August 29, 2008Date of Patent: September 7, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoshi Kobayashi, Ikuko Kawamata
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Patent number: 7768009Abstract: A display device including a thin film transistor with high electric characteristics and high reliability, and a method for manufacturing the display device with high mass-productivity. In a display device including an inverted-staggered channel-stop-type thin film transistor, the inverted-staggered channel-stop-type thin film transistor includes a microcrystalline semiconductor film including a channel formation region, and an impurity region containing an impurity element of one conductivity type is selectively provided in a region which is not overlapped with source and drain electrodes, in the channel formation region of the microcrystalline semiconductor film.Type: GrantFiled: August 22, 2008Date of Patent: August 3, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoshi Kobayashi, Ikuko Kawamata, Koji Dairiki, Shigeki Komori, Toshiyuki Isa, Shunpei Yamazaki
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Patent number: 7768617Abstract: When a conductive layer is formed, a first liquid composition containing a conductive material is applied on an outer side of a pattern that is desired to be formed (corresponding to a contour or an edge portion of a pattern), and a first conductive layer (insulating layer) having a frame-shape is formed. A second liquid composition containing a conductive material is applied so as to fill a space inside the first conductive layer having a frame-shape, whereby a second conductive layer is formed. The first conductive layer and the second conductive layer are formed so as to be in contact with each other, and the first conductive layer is formed so as to surround the second conductive layer. Therefore, the first conductive layer and the second conductive layer can be used as one continuous conductive layer.Type: GrantFiled: June 26, 2007Date of Patent: August 3, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hironobu Shoji, Ikuko Kawamata
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Publication number: 20100129969Abstract: To provide a highly reliable semiconductor device and a method for manufacturing the semiconductor device, where defects such as a short between a gate electrode layer and a semiconductor layer and a leakage current, which would otherwise be caused due to a coverage defect of the semiconductor layer with an insulating layer, can be prevented. In order to form a plurality of semiconductor elements over an insulating surface, a semiconductor layer is not separated into a plurality of island-shape semiconductor layers, but instead, element isolation regions, which electrically insulate a plurality of element regions functioning as semiconductor elements, are formed in one semiconductor layer, i.e., a first element isolation region with high resistance and a second element isolation region which has a contact with the element region and has a conductivity type opposite to that of the source and drain regions of the element region.Type: ApplicationFiled: January 27, 2010Publication date: May 27, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Ikuko KAWAMATA, Yasuyuki ARAI
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Publication number: 20100120226Abstract: When single crystal semiconductor layers are transposed from a single crystal semiconductor substrate (a bond wafer), the single crystal semiconductor substrate is etched selectively (this step is also referred to as groove processing), and a plurality of single crystal semiconductor layers, which are being divided in size of manufactured semiconductor elements, are transposed to a different substrate (a base substrate). Thus, a plurality of island-shaped single crystal semiconductor layers (SOI layers) can be formed over the base substrate. Further, etching is performed on the single crystal semiconductor layers formed over the base substrate, and the shapes of the SOI layers are controlled precisely by being processed and modified.Type: ApplicationFiled: January 25, 2010Publication date: May 13, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei Yamazaki, Ikuko Kawamata, Yasuyuki Arai
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Publication number: 20100099217Abstract: Conductive layers having knots are adjacently formed with uniform distance therebetween. Droplets of the conductive layers are discharged to stagger centers of the droplets in a length direction of wirings so that the centers of the discharged droplets are not on the same line in a line width direction between the adjacent conductive layers. Since the centers of the droplets are staggered, parts of the conductive layers each having a widest line width (the widest width of knot) are not connected to each other, and the conductive layers can be formed adjacently with a shorter distance therebetween.Type: ApplicationFiled: December 18, 2009Publication date: April 22, 2010Inventors: Toshiyuki Isa, Gen Fujii, Masafumi Morisue, Ikuko Kawamata