Patents by Inventor Ikuo Yoshihara

Ikuo Yoshihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10930694
    Abstract: A semiconductor image sensor module 1 at least includes a semiconductor image sensor chip 2 having a transistor forming region on a first main surface of a semiconductor substrate and having a photoelectric conversion region with a light incident surface formed on a second main surface on the side opposite to the first main surface and an image signal processing chip 3 for processing image signals formed in the semiconductor image sensor chip 2, wherein a plurality of bump electrodes 15a are formed on a first main surface, a plurality of bump electrodes 15b are formed on the image signal processing chip 3, both the chips 2 and 3 are formed to be laminated through heat dissipating means 4 and the plurality of bump electrodes 15a of the semiconductor image sensor chip 2 and the plurality of bump electrodes 15b on the image signal processing chip 3 are electrically connected.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: February 23, 2021
    Assignee: Sony Corporation
    Inventors: Ikuo Yoshihara, Masamitsu Yamanaka
  • Publication number: 20190333956
    Abstract: A semiconductor image sensor module 1 at least includes a semiconductor image sensor chip 2 having a transistor forming region on a first main surface of a semiconductor substrate and having a photoelectric conversion region with a light incident surface formed on a second main surface on the side opposite to the first main surface and an image signal processing chip 3 for processing image signals formed in the semiconductor image sensor chip 2, wherein a plurality of bump electrodes 15a are formed on a first main surface, a plurality of bump electrodes 15b are formed on the image signal processing chip 3, both the chips 2 and 3 are formed to be laminated through heat dissipating means 4 and the plurality of bump electrodes 15a of the semiconductor image sensor chip 2 and the plurality of bump electrodes 15b on the image signal processing chip 3 are electrically connected.
    Type: Application
    Filed: May 13, 2019
    Publication date: October 31, 2019
    Inventors: Ikuo Yoshihara, Masamitsu Yamanaka
  • Patent number: 10319772
    Abstract: A semiconductor image sensor module 1 at least includes a semiconductor image sensor chip 2 having a transistor forming region on a first main surface of a semiconductor substrate and having a photoelectric conversion region with a light incident surface formed on a second main surface on the side opposite to the first main surface and an image signal processing chip 3 for processing image signals formed in the semiconductor image sensor chip 2, wherein a plurality of bump electrodes 15a are formed on a first main surface, a plurality of bump electrodes 15b are formed on the image signal processing chip 3, both the chips 2 and 3 are formed to be laminated through heat dissipating means 4 and the plurality of bump electrodes 15a of the semiconductor image sensor chip 2 and the plurality of bump electrodes 15b on the image signal processing chip 3 are electrically connected.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: June 11, 2019
    Assignee: Sony Corporation
    Inventors: Ikuo Yoshihara, Masamitsu Yamanaka
  • Patent number: 9985065
    Abstract: A solid-state imaging device includes: a photodiode formed to be segmented with respect to each pixel in a pixel area in which plural pixels are integrated on a light receiving surface of a semiconductor substrate; an insulator film formed on the semiconductor substrate to cover the photodiode; a recessed part formed with respect to each of the pixels in the insulator film in an upper part of the photodiode; a first light transmission layer of a siloxane resin formed to fill the recessed part and configure an optical waveguide in the pixel area; a second light transmission layer formed to configure an on-chip lens with respect to each of the pixels in the pixel area; and a guard ring formed to surround an outer circumference of the pixel area to partition an inner area containing the pixel area and an outer dicing area.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: May 29, 2018
    Assignee: Sony Corporation
    Inventors: Hideki Hirano, Akiko Ogino, Kenju Nishikido, Iwao Sugiura, Haruhiko Ajisawa, Ikuo Yoshihara
  • Patent number: 9871985
    Abstract: The present disclosure relates to a solid-state image pickup device and an electronic apparatus capable of generating highly-accurate image pickup signals having a large dynamic range. Pixels each include a high-sensitivity pixel and a low-sensitivity pixel having a lower sensitivity than the high-sensitivity pixel. A control gate controls a potential of a photoelectric conversion device of the low-sensitivity pixel. The present disclosure is applicable to, for example, a CMOS image sensor that includes both the high-sensitivity pixel and the low-sensitivity pixel having a lower sensitivity than the high-sensitivity pixel and controls a potential of the photoelectric conversion device of the low-sensitivity pixel.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: January 16, 2018
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Kyohei Yoshimura, Atsushi Masagaki, Ikuo Yoshihara, Ryoji Suzuki, Takashi Machida, Shinichiro Izawa
  • Patent number: 9466630
    Abstract: A solid-state imaging device with a semiconductor substrate; a pixel formation region in the substrate and including a pixel made of a photoelectric conversion element; and an element isolation portion in the substrate and including an element isolation insulating layer and an impurity element isolation region. The element isolation insulating layer is positioned in a surface of the substrate. The impurity element isolation region is positioned under the element isolation insulating layer and within the substrate. The impurity element isolation region has at least a portion with a width that is narrower than that of the element isolation insulating layer. The photoelectric conversion element extends to a position under the element isolation insulating layer of the element isolation portion.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: October 11, 2016
    Assignee: Sony Corporation
    Inventor: Ikuo Yoshihara
  • Publication number: 20160156862
    Abstract: The present disclosure relates to a solid-state image pickup device and an electronic apparatus capable of generating highly-accurate image pickup signals having a large dynamic range. Pixels each include a high-sensitivity pixel and a low-sensitivity pixel having a lower sensitivity than the high-sensitivity pixel. A control gate controls a potential of a photoelectric conversion device of the low-sensitivity pixel. The present disclosure is applicable to, for example, a CMOS image sensor that includes both the high-sensitivity pixel and the low-sensitivity pixel having a lower sensitivity than the high-sensitivity pixel and controls a potential of the photoelectric conversion device of the low-sensitivity pixel.
    Type: Application
    Filed: July 8, 2014
    Publication date: June 2, 2016
    Inventors: Kyohei YOSHIMURA, Atsushi MASAGAKI, Ikuo YOSHIHARA, Ryoji SUZUKI, Takashi MACHIDA, Shinichiro IZAWA
  • Publication number: 20160141324
    Abstract: A semiconductor image sensor module 1 at least includes a semiconductor image sensor chip 2 having a transistor forming region on a first main surface of a semiconductor substrate and having a photoelectric conversion region with a light incident surface formed on a second main surface on the side opposite to the first main surface and an image signal processing chip 3 for processing image signals formed in the semiconductor image sensor chip 2, wherein a plurality of bump electrodes 15a are formed on a first main surface, a plurality of bump electrodes 15b are formed on the image signal processing chip 3, both the chips 2 and 3 are formed to be laminated through heat dissipating means 4 and the plurality of bump electrodes 15a of the semiconductor image sensor chip 2 and the plurality of bump electrodes 15b on the image signal processing chip 3 are electrically connected.
    Type: Application
    Filed: January 27, 2016
    Publication date: May 19, 2016
    Inventors: Ikuo Yoshihara, Masamitsu Yamanaka
  • Publication number: 20160104736
    Abstract: A solid-state imaging device includes: a photodiode formed to be segmented with respect to each pixel in a pixel area in which plural pixels are integrated on a light receiving surface of a semiconductor substrate; an insulator film formed on the semiconductor substrate to cover the photodiode; a recessed part formed with respect to each of the pixels in the insulator film in an upper part of the photodiode; a first light transmission layer of a siloxane resin formed to fill the recessed part and configure an optical waveguide in the pixel area; a second light transmission layer formed to configure an on-chip lens with respect to each of the pixels in the pixel area; and a guard ring formed to surround an outer circumference of the pixel area to partition an inner area containing the pixel area and an outer dicing area.
    Type: Application
    Filed: September 11, 2015
    Publication date: April 14, 2016
    Inventors: Hideki Hirano, Akiko Ogino, Kenju Nishikido, Iwao Sugiura, Haruhiko Ajisawa, Ikuo Yoshihara
  • Patent number: 9269736
    Abstract: A semiconductor image sensor module 1 at least includes a semiconductor image sensor chip 2 having a transistor forming region on a first main surface of a semiconductor substrate and having a photoelectric conversion region with a light incident surface formed on a second main surface on the side opposite to the first main surface and an image signal processing chip 3 for processing image signals formed in the semiconductor image sensor chip 2, wherein a plurality of bump electrodes 15a are formed on a first main surface, a plurality of bump electrodes 15b are formed on the image signal processing chip 3, both the chips 2 and 3 are formed to be laminated through heat dissipating means 4 and the plurality of bump electrodes 15a of the semiconductor image sensor chip 2 and the plurality of bump electrodes 15b on the image signal processing chip 3 are electrically connected.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: February 23, 2016
    Assignee: SONY CORPORATION
    Inventors: Ikuo Yoshihara, Masamitsu Yamanaka
  • Patent number: 9269735
    Abstract: The present disclosure provides a method of manufacturing a solid-state imaging device, including, forming on a first substrate a semiconductor thin film which is to be photoelectric conversion sections, forming driving circuits on a face side of a second substrate, laminating the first substrate and the second substrate by disposing the first substrate and second substrate opposite to each other in a condition in which the semiconductor thin film is connected to the driving circuits, and removing the first substrate from the semiconductor thin film in a condition in which the semiconductor thin film is left on the second substrate side.
    Type: Grant
    Filed: December 1, 2011
    Date of Patent: February 23, 2016
    Assignee: SONY CORPORATION
    Inventors: Kazuo Ohta, Ikuo Yoshihara
  • Publication number: 20150364509
    Abstract: A solid-state imaging device with a semiconductor substrate; a pixel formation region in the substrate and including a pixel made of a photoelectric conversion element; and an element isolation portion in the substrate and including an element isolation insulating layer and an impurity element isolation region. The element isolation insulating layer is positioned in a surface of the substrate. The impurity element isolation region is positioned under the element isolation insulating layer and within the substrate. The impurity element isolation region has at least a portion with a width that is narrower than that of the element isolation insulating layer. The photoelectric conversion element extends to a position under the element isolation insulating layer of the element isolation portion.
    Type: Application
    Filed: August 27, 2015
    Publication date: December 17, 2015
    Inventor: Ikuo Yoshihara
  • Patent number: 9171877
    Abstract: A solid-state imaging device includes: a photodiode formed to be segmented with respect to each pixel in a pixel area in which plural pixels are integrated on a light receiving surface of a semiconductor substrate; an insulator film formed on the semiconductor substrate to cover the photodiode; a recessed part formed with respect to each of the pixels in the insulator film in an upper part of the photodiode; a first light transmission layer of a siloxane resin formed to fill the recessed part and configure an optical waveguide in the pixel area; a second light transmission layer formed to configure an on-chip lens with respect to each of the pixels in the pixel area; and a guard ring formed to surround an outer circumference of the pixel area to partition an inner area containing the pixel area and an outer dicing area.
    Type: Grant
    Filed: December 9, 2009
    Date of Patent: October 27, 2015
    Assignee: Sony Corporation
    Inventors: Hideki Hirano, Akiko Ogino, Kenju Nishikido, Iwao Sugiura, Haruhiko Ajisawa, Ikuo Yoshihara
  • Patent number: 9159764
    Abstract: A solid-state imaging device with a semiconductor substrate; a pixel formation region in the substrate and including a pixel made of a photoelectric conversion element; and an element isolation portion in the substrate and including an element isolation insulating layer and an impurity element isolation region. The element isolation insulating layer is positioned in a surface of the substrate. The impurity element isolation region is positioned under the element isolation insulating layer and within the substrate. The impurity element isolation region has at least a portion with a width that is narrower than that of the element isolation insulating layer. The photoelectric conversion element extends to a position under the element isolation insulating layer of the element isolation portion.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: October 13, 2015
    Assignee: SONY CORPORATION
    Inventor: Ikuo Yoshihara
  • Patent number: 9058972
    Abstract: A semiconductor device includes: a first semiconductor chip; and a second semiconductor chip that is stacked on the first semiconductor chip. The first semiconductor chip includes a first wiring portion of which a side surface is exposed at a side portion of the first semiconductor chip. The second semiconductor chip includes a second wiring portion of which a side surface is exposed at a side portion of the second semiconductor chip. The respective side surfaces of the first wiring portion and the second wiring portion, which are exposed at the side portions of the first semiconductor chip and the second semiconductor chip, are covered by a conductive layer, and the first wiring portion and the second wiring portion are electrically connected to each other through the conductive layer.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: June 16, 2015
    Assignee: SONY CORPORATION
    Inventors: Ikuo Yoshihara, Taku Umebayashi, Hiroshi Takahashi, Hironobu Yoshida
  • Publication number: 20150041872
    Abstract: A solid-state imaging device with a semiconductor substrate; a pixel formation region in the substrate and including a pixel made of a photoelectric conversion element; and an element isolation portion in the substrate and including an element isolation insulating layer and an impurity element isolation region. The element isolation insulating layer is positioned in a surface of the substrate. The impurity element isolation region is positioned under the element isolation insulating layer and within the substrate. The impurity element isolation region has at least a portion with a width that is narrower than that of the element isolation insulating layer. The photoelectric conversion element extends to a position under the element isolation insulating layer of the element isolation portion.
    Type: Application
    Filed: October 24, 2014
    Publication date: February 12, 2015
    Inventor: Ikuo Yoshihara
  • Patent number: 8896038
    Abstract: A solid-state imaging device with a semiconductor substrate; a pixel formation region in the substrate and including a pixel made of a photoelectric conversion element; and an element isolation portion in the substrate and including an element isolation insulating layer and an impurity element isolation region. The element isolation insulating layer is positioned in a surface of the substrate. The impurity element isolation region is positioned under the element isolation insulating layer and within the substrate. The impurity element isolation region has at least a portion with a width that is narrower than that of the element isolation insulating layer. The photoelectric conversion element extends to a position under the element isolation insulating layer of the element isolation portion.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: November 25, 2014
    Assignee: Sony Corporation
    Inventor: Ikuo Yoshihara
  • Publication number: 20140306313
    Abstract: A semiconductor device includes: a first semiconductor chip; and a second semiconductor chip that is stacked on the first semiconductor chip. The first semiconductor chip includes a first wiring portion of which a side surface is exposed at a side portion of the first semiconductor chip. The second semiconductor chip includes a second wiring portion of which a side surface is exposed at a side portion of the second semiconductor chip. The respective side surfaces of the first wiring portion and the second wiring portion, which are exposed at the side portions of the first semiconductor chip and the second semiconductor chip, are covered by a conductive layer, and the first wiring portion and the second wiring portion are electrically connected to each other through the conductive layer.
    Type: Application
    Filed: June 26, 2014
    Publication date: October 16, 2014
    Inventors: Ikuo Yoshihara, Taku Umebayashi, Hiroshi Takahashi, Hironobu Yoshida
  • Patent number: 8809983
    Abstract: A semiconductor device includes: a first semiconductor chip; and a second semiconductor chip that is stacked on the first semiconductor chip. The first semiconductor chip includes a first wiring portion of which a side surface is exposed at a side portion of the first semiconductor chip. The second semiconductor chip includes a second wiring portion of which a side surface is exposed at a side portion of the second semiconductor chip. The respective side surfaces of the first wiring portion and the second wiring portion, which are exposed at the side portions of the first semiconductor chip and the second semiconductor chip, are covered by a conductive layer, and the first wiring portion and the second wiring portion are electrically connected to each other through the conductive layer.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: August 19, 2014
    Assignee: Sony Corporation
    Inventors: Ikuo Yoshihara, Taku Umebayashi, Hiroshi Takahashi, Hironobu Yoshida
  • Publication number: 20140035088
    Abstract: A semiconductor image sensor module 1 at least includes a semiconductor image sensor chip 2 having a transistor forming region on a first main surface of a semiconductor substrate and having a photoelectric conversion region with a light incident surface formed on a second main surface on the side opposite to the first main surface and an image signal processing chip 3 for processing image signals formed in the semiconductor image sensor chip 2, wherein a plurality of bump electrodes 15a are formed on a first main surface, a plurality of bump electrodes 15b are formed on the image signal processing chip 3, both the chips 2 and 3 are formed to be laminated through heat dissipating means 4 and the plurality of bump electrodes 15a of the semiconductor image sensor chip 2 and the plurality of bump electrodes 15b on the image signal processing chip 3 are electrically connected.
    Type: Application
    Filed: October 7, 2013
    Publication date: February 6, 2014
    Applicant: Sony Corporation
    Inventors: Ikuo Yoshihara, Masamitsu Yamanaka