Patents by Inventor Ilia Greenblat

Ilia Greenblat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170147508
    Abstract: Methods and systems are provided for accessing data stored in a memory. An example system may comprise a memory and one or more control circuits for managing access to the memory. The memory may comprise a first portion for storing a plurality of data items, and a second portion, distinct from the first portion, for storing access related information. The access related information may comprise a plurality of access entries, with each access entry corresponding to a particular respective data item. In response to request for a particular data item, the one or more control circuits may search for a match in the access related information access, and may provide access to a data item in the first portion of the memory, corresponding to the requested data item, only in response to detecting a match in the plurality of access entries, based on item related information provided in the request.
    Type: Application
    Filed: December 6, 2016
    Publication date: May 25, 2017
    Inventor: Ilia Greenblat
  • Patent number: 9514060
    Abstract: Device, system and method of accessing data stored in a memory. For example, a device may include a memory to store a plurality of data items to be accessed by a processor; a cache manager to manage, a cache within the memory, the cache including a plurality of pointer entries, wherein each pointer entry includes an identifier of a respective data item and a pointer to an address of the data item; and a search module to receive from the cache manager an identifier of a requested data item, search the plurality of pointer entries for the identifier of the requested data item and, if a pointer entry is detected to include an identifier of a respective data item that matches the identifier of the requested data item then, provide the cache manager with the pointer from the detected entry. Other embodiments are described and claimed.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: December 6, 2016
    Assignee: Entropic Communications, LLC
    Inventor: Ilia Greenblat
  • Publication number: 20100030972
    Abstract: Device, system and method of accessing data stored in a memory. For example, a device may include a memory to store a plurality of data items to be accessed by a processor; a cache manager to manage, a cache within the memory, the cache including a plurality of pointer entries, wherein each pointer entry includes an identifier of a respective data item and a pointer to an address of the data item; and a search module to receive from the cache manager an identifier of a requested data item, search the plurality of pointer entries for the identifier of the requested data item and, if a pointer entry is detected to include an identifier of a respective data item that matches the identifier of the requested data item then, provide the cache manager with the pointer from the detected entry. Other embodiments are described and claimed.
    Type: Application
    Filed: July 29, 2008
    Publication date: February 4, 2010
    Applicant: Entropic Communications, Inc.
    Inventor: Ilia Greenblat
  • Publication number: 20090327563
    Abstract: Device, system and method of connecting between data-handling circuits of an integrated circuit. For example, an integrated circuit includes a plurality of data-handling circuits; and a circuit-interconnect topology including at least one store-and-forward circuit along at least one connection path between at least a first and a second of the plurality of data-handling circuits. Other embodiments are described and claimed.
    Type: Application
    Filed: June 30, 2008
    Publication date: December 31, 2009
    Inventor: Ilia Greenblat
  • Publication number: 20080298455
    Abstract: A clock generator for providing a desired system clock signal in accordance with an embodiment of the present application includes a ring oscillator operable to provide an oscillator output signal having a first frequency, a divider operable to divide the oscillator output signal by a predetermined divisor and to output the divided signal as the desired system clock signal, a reference device operable to provide a reference signal with a known second frequency and a ratio device operable to provide a ratio value indicative of a relationship between the oscillator output signal and the reference signal, wherein the predetermined divisor of the divider is determined based on the ratio value such that the desired system clock signal has a desired frequency.
    Type: Application
    Filed: December 17, 2007
    Publication date: December 4, 2008
    Applicant: INTERNATIONAL RECTIFIER CORPORATION
    Inventors: Ilia Greenblat, Amir Helzer
  • Patent number: 7103008
    Abstract: Systems and methods are provided for implementing: a rings architecture for communications and data handling systems; an enumeration process for automatically configuring the ring topology; automatic routing of messages through bridges; extending a ring topology to external devices; write-ahead functionality to promote efficiency; wait-till-reset operation resumption; in-vivo scan through rings topology; staggered clocking arrangement; and stray message detection and eradication. Other inventive elements conveyed include: an architectural overview of a packet processor; a programming model for a packet processor; an instruction pipeline for a packet processor; and use of a packet processor as a module on a rings-based architecture.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: September 5, 2006
    Assignee: Conexant, Inc.
    Inventors: Ilia Greenblat, Moshe Refaeli
  • Publication number: 20030212830
    Abstract: Systems and methods are provided for implementing: a rings architecture for communications and data handling systems; an enumeration process for automatically configuring the ring topology; automatic routing of messages through bridges; extending a ring topology to external devices; write-ahead functionality to promote efficiency; wait-till-reset operation resumption; in-vivo scan through rings topology; staggered clocking arrangement; and stray message detection and eradication. Other inventive elements conveyed include: an architectural overview of a packet processor; a programming model for a packet processor; an instruction pipeline for a packet processor; and use of a packet processor as a module on a rings-based architecture.
    Type: Application
    Filed: July 2, 2002
    Publication date: November 13, 2003
    Applicant: Globespan Virata Incorporated
    Inventors: Ilia Greenblat, Moshe Tarrab, Uri Trichter, Oded Norman, Elizer Weitz
  • Publication number: 20030204636
    Abstract: Systems and methods are provided for implementing: a rings architecture for communications and data handling systems; an enumeration process for automatically configuring the ring topology; automatic routing of messages through bridges; extending a ring topology to external devices; write-ahead functionality to promote efficiency; wait-till-reset operation resumption; in-vivo scan through rings topology; staggered clocking arrangement; and stray message detection and eradication. Other inventive elements conveyed include: an architectural overview of a packet processor; a programming model for a packet processor; an instruction pipeline for a packet processor; and use of a packet processor as a module on a rings-based architecture.
    Type: Application
    Filed: July 2, 2002
    Publication date: October 30, 2003
    Applicant: GlobespanVirata Incorporated
    Inventors: Ilia Greenblat, Moshe Rafaeli, Elizer Weitz
  • Publication number: 20030200342
    Abstract: Systems and methods are provided for implementing: a rings architecture for communications and data handling systems; an enumeration process for automatically configuring the ring topology; automatic routing of messages through bridges; extending a ring topology to external devices; write-ahead functionality to promote efficiency; wait-till-reset operation resumption; in-vivo scan through rings topology; staggered clocking arrangement; and stray message detection and eradication. Other inventive elements conveyed include: an architectural overview of a packet processor; a programming model for a packet processor; an instruction pipeline for a packet processor; and use of a packet processor as a module on a rings-based architecture.
    Type: Application
    Filed: July 2, 2002
    Publication date: October 23, 2003
    Applicant: Globespan Virata Incorporated
    Inventors: Ilia Greenblat, Amir Helzer
  • Publication number: 20030200343
    Abstract: Systems and methods are provided for implementing: a rings architecture for communications and data handling systems; an enumeration process for automatically configuring the ring topology; automatic routing of messages through bridges; extending a ring topology to external devices; write-ahead functionality to promote efficiency; wait-till-reset operation resumption; in-vivo scan through rings topology; staggered clocking arrangement; and stray message detection and eradication. Other inventive elements conveyed include: an architectural overview of a packet processor; a programming model for a packet processor; an instruction pipeline for a packet processor; and use of a packet processor as a module on a rings-based architecture.
    Type: Application
    Filed: July 2, 2002
    Publication date: October 23, 2003
    Applicant: Globespan Virata Incorporated
    Inventors: Ilia Greenblat, Moshe Refaeli
  • Publication number: 20030200339
    Abstract: Systems and methods are provided for implementing: a rings architecture for communications and data handling systems; an enumeration process for automatically configuring the ring topology; automatic routing of messages through bridges; extending a ring topology to external devices; write-ahead functionality to promote efficiency; wait-till-reset operation resumption; in-vivo scan through rings topology; staggered clocking arrangement; and stray message detection and eradication. Other inventive elements conveyed include: an architectural overview of a packet processor; a programming model for a packet processor; an instruction pipeline for a packet processor; and use of a packet processor as a module on a rings-based architecture.
    Type: Application
    Filed: July 2, 2002
    Publication date: October 23, 2003
    Applicant: GlobespanVirata Incorporated
    Inventors: Ilia Greenblat, Moshe Tarrab, Uri Trichter, Oded Norman, Boris Zabarski, Moshe Refaeli, Elizer Weitz
  • Publication number: 20030195991
    Abstract: Systems and methods are provided for implementing: a rings architecture for communications and data handling systems; an enumeration process for automatically configuring the ring topology; automatic routing of messages through bridges; extending a ring topology to external devices; write-ahead functionality to promote efficiency; wait-till-reset operation resumption; in-vivo scan through rings topology; staggered clocking arrangement; and stray message detection and eradication. Other inventive elements conveyed include: an architectural overview of a packet processor; a programming model for a packet processor; an instruction pipeline for a packet processor; and use of a packet processor as a module on a rings-based architecture.
    Type: Application
    Filed: July 2, 2002
    Publication date: October 16, 2003
    Applicant: GlobespanVirata Incorporated
    Inventors: Jonathan Masel, Boris Zabarski, Ilia Greenblat
  • Publication number: 20030195990
    Abstract: Systems and methods are provided for implementing: a rings architecture for communications and data handling systems; an enumeration process for automatically configuring the ring topology; automatic routing of messages through bridges; extending a ring topology to external devices; write-ahead functionality to promote efficiency; wait-till-reset operation resumption; in-vivo scan through rings topology; staggered clocking arrangement; and stray message detection and eradication. Other inventive elements conveyed include: an architectural overview of a packet processor; a programming model for a packet processor; an instruction pipeline for a packet processor; and use of a packet processor as a module on a rings-based architecture.
    Type: Application
    Filed: July 2, 2002
    Publication date: October 16, 2003
    Applicant: Globespan Virata Incorporated
    Inventor: Ilia Greenblat
  • Publication number: 20030195989
    Abstract: Systems and methods are provided for implementing: a rings architecture for communications and data handling systems; an enumeration process for automatically configuring the ring topology; automatic routing of messages through bridges; extending a ring topology to external devices; write-ahead functionality to promote efficiency; wait-till-reset operation resumption; in-vivo scan through rings topology; staggered clocking arrangement; and stray message detection and eradication. Other inventive elements conveyed include: an architectural overview of a packet processor; a programming model for a packet processor; an instruction pipeline for a packet processor; and use of a packet processor as a module on a rings-based architecture.
    Type: Application
    Filed: July 2, 2002
    Publication date: October 16, 2003
    Applicant: Globespan Virata Incorporated
    Inventor: Ilia Greenblat
  • Publication number: 20030191863
    Abstract: Systems and methods are provided for implementing: a rings architecture for communications and data handling systems; an enumeration process for automatically configuring the ring topology; automatic routing of messages through bridges; extending a ring topology to external devices; write-ahead functionality to promote efficiency; wait-till-reset operation resumption; in-vivo scan through rings topology; staggered clocking arrangement; and stray message detection and eradication. Other inventive elements conveyed include: an architectural overview of a packet processor; a programming model for a packet processor; an instruction pipeline for a packet processor; and use of a packet processor as a module on a rings-based architecture.
    Type: Application
    Filed: July 2, 2002
    Publication date: October 9, 2003
    Applicant: GlobespanVirata Incorporated
    Inventor: Ilia Greenblat
  • Publication number: 20030191861
    Abstract: Systems and methods are provided for implementing: a rings architecture for communications and data handling systems; an enumeration process for automatically configuring the ring topology; automatic routing of messages through bridges; extending a ring topology to external devices; write-ahead functionality to promote efficiency; wait-till-reset operation resumption; in-vivo scan through rings topology; staggered clocking arrangement; and stray message detection and eradication. Other inventive elements conveyed include: an architectural overview of a packet processor; a programming model for a packet processor; an instruction pipeline for a packet processor; and use of a packet processor as a module on a rings-based architecture.
    Type: Application
    Filed: July 2, 2002
    Publication date: October 9, 2003
    Applicant: GlobespanVirata Incorporated
    Inventor: Ilia Greenblat
  • Publication number: 20030172189
    Abstract: Systems and methods are provided for implementing: a rings architecture for communications and data handling systems; an enumeration process for automatically configuring the ring topology; automatic routing of messages through bridges; extending a ring topology to external devices; write-ahead functionality to promote efficiency; wait-till-reset operation resumption; in-vivo scan through rings topology; staggered clocking arrangement; and stray message detection and eradication. Other inventive elements conveyed include: an architectural overview of a packet processor; a programming model for a packet processor; an instruction pipeline for a packet processor; and use of a packet processor as a module on a rings-based architecture.
    Type: Application
    Filed: July 2, 2002
    Publication date: September 11, 2003
    Applicant: GlobespanVirata Incorporated
    Inventor: Ilia Greenblat
  • Publication number: 20030172257
    Abstract: Systems and methods are provided for implementing: a rings architecture for communications and data handling systems; an enumeration process for automatically configuring the ring topology; automatic routing of messages through bridges; extending a ring topology to external devices; write-ahead functionality to promote efficiency; wait-till-reset operation resumption; in-vivo scan through rings topology; staggered clocking arrangement; and stray message detection and eradication. Other inventive elements conveyed include: an architectural overview of a packet processor; a programming model for a packet processor; an instruction pipeline for a packet processor; and use of a packet processor as a module on a rings-based architecture.
    Type: Application
    Filed: July 2, 2002
    Publication date: September 11, 2003
    Applicant: Globespan Virata Incorporated
    Inventors: Ilia Greenblat, Moshe Refaeli
  • Publication number: 20030172190
    Abstract: Systems and methods are provided for implementing: a rings architecture for communications and data handling systems; an enumeration process for automatically configuring the ring topology; automatic routing of messages through bridges; extending a ring topology to external devices; write-ahead functionality to promote efficiency; wait-till-reset operation resumption; in-vivo scan through rings topology; staggered clocking arrangement; and stray message detection and eradication. Other inventive elements conveyed include: an architectural overview of a packet processor; a programming model for a packet processor; an instruction pipeline for a packet processor; and use of a packet processor as a module on a rings-based architecture.
    Type: Application
    Filed: July 2, 2002
    Publication date: September 11, 2003
    Applicant: GlobespanVirata Incorporated
    Inventor: Ilia Greenblat
  • Publication number: 20030167348
    Abstract: Systems and methods are provided for implementing: a rings architecture for communications and data handling systems; an enumeration process for automatically configuring the ring topology; automatic routing of messages through bridges; extending a ring topology to external devices; write-ahead functionality to promote efficiency; wait-till-reset operation resumption; in-vivo scan through rings topology; staggered clocking arrangement; and stray message detection and eradication. Other inventive elements conveyed include: an architectural overview of a packet processor; a programming model for a packet processor; an instruction pipeline for a packet processor; and use of a packet processor as a module on a rings-based architecture.
    Type: Application
    Filed: July 2, 2002
    Publication date: September 4, 2003
    Applicant: GlobespanVirata, Inc.
    Inventor: Ilia Greenblat