Patents by Inventor Isao Hatano

Isao Hatano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4051471
    Abstract: A keying input apparatus is provided which includes; a bit pattern generator responsive to a clock signal for generating different bit patterns of four bits, in a bit sequence and a decoding matrix for converting the different bit patterns at every fourth bit, into individual digit timing signals. A plurality of key switches are connected at one end thereof with corresponding ones of the digit timing signals and connected to a common terminal at the other ends thereof, to drive a gate responsive to the common connected output of said key switches for allowing a coded signal representative of a particular depressed key to be withdrawn from the bit pattern generator and transfer it to a circulation register for storing the coded signal. Depression of a given key thus enables the gate at a corresponding digit timing to load a coded signal corresponding to that digit timing in the register, so that the coded signal as stored in the register uniquely identifies the depressed key.
    Type: Grant
    Filed: November 29, 1974
    Date of Patent: September 27, 1977
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Isao Hatano, Akira Nagano, Kazuaki Urasaki
  • Patent number: 3950743
    Abstract: A keying input apparatus operates as a function of two kinds of timing signals, one being of a first timing period and generally composed of a plurality of digit timing signals generated in a digit sequence and the other being of a second timing period for disabling a display device during that period, such that a plurality of pieces of information, such as the digit timing signals and/or segment selection signals for the display device, are provided from a plurality of output terminals during said first timing signal for the purpose of outputting thereof to the display device, and a plurality of different coded signals, each composed of a plurality of bits, in a bit sequence, are provided from the same said plurality of output terminals during said second timing signal, each of which output terminals is individually connected to a corresponding one of a plurality of key switches, which are commonly connected through a common terminal to a register, so that any desired coded signal, as selected by a correspon
    Type: Grant
    Filed: April 1, 1974
    Date of Patent: April 13, 1976
    Assignee: Omron Tateisi Electronics Co., Ltd.
    Inventors: Isao Hatano, Akira Nagano, Kazuaki Urasaki