Patents by Inventor Issei Satoh

Issei Satoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11891720
    Abstract: A gallium arsenide single crystal substrate having a main surface, in which a ratio of the number of As atoms existing as diarenic trioxide to the number of As atoms existing as diarsenic pentoxide is greater than or equal to 2 when the main surface is measured by X-ray photoelectron spectroscopy, in which an X-ray having energy of 150 eV is used and a take-off angle of a photoelectron is set to 5°. Arithmetic average roughness (Ra) of the main surface is less than or equal to 0.3 nm.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: February 6, 2024
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Koji Uematsu, Issei Satoh, Fumitake Nakanishi
  • Publication number: 20230002931
    Abstract: A gallium arsenide single crystal substrate having a main surface, in which a ratio of the number of As atoms existing as diarsenic trioxide to the number of As atoms existing as diarsenic pentoxide is greater than or equal to 2 when the main surface is measured by X-ray photoelectron spectroscopy, in which an X-ray having energy of 150 eV is used and a take-off angle of a photoelectron is set to 5°. Arithmetic average roughness (Ra) of the main surface is less than or equal to 0.3 nm.
    Type: Application
    Filed: September 1, 2020
    Publication date: January 5, 2023
    Inventors: Koji UEMATSU, Issei SATOH, Fumitake NAKANISHI
  • Publication number: 20220411963
    Abstract: Provided is a synthetic single-crystal diamond containing nitrogen. In an X-ray absorption fine structure thereof, a ratio I405/I412 between an intensity I405 of a peak which appears at an energy of 405±1 eV and has a full width at ¾ maximum of 3 eV or more and an intensity I412 of a peak which appears at an energy of 412±2 eV is less than 1.
    Type: Application
    Filed: August 14, 2020
    Publication date: December 29, 2022
    Inventors: Yoshiki NISHIBAYASHI, Minori TERAMOTO, Yutaka KOBAYASHI, Hitoshi SUMIYA, Issei SATOH, Ryo TOYOSHIMA
  • Patent number: 10329644
    Abstract: A Ta—Nb alloy powder which provides a capacitor having a higher capacitance than a Ta capacitor and a better thermal stability in terms of an oxide film than a Nb capacitor, the Ta—Nb alloy powder being a Ta—Nb alloy powder produced by a thermal CVD method, wherein a content of Nb is 1 to 50 mass %, and an average particle diameter of primary particles is 30 to 200 nm, preferably, a CV value per unit mass of the powder (?F·V/g) is 250 k?F·V/g or more, or further, a CV value per unit volume (?F·V/mm3) in terms of a molded body whose molding density ? (g/cm3) is ?c (g/cm3)=?0.012RNb+3.57, wherein RNb:Nb content (mass %) in an alloy, is 900 ?F·V/mm3 or more, and an anode element for a solid electrolytic capacitor using the alloy powder.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: June 25, 2019
    Assignee: ISHIHARA CHEMICAL CO., LTD.
    Inventors: Takayuki Maeshima, Issei Satoh, Hisakazu Sakai, Jun Furutani, Yoshihiko Takata, Tsukasa Kondo
  • Publication number: 20170283916
    Abstract: A Ta-Nb alloy powder which has provides a capacitor having a higher capacitance than a Ta capacitor and a better thermal stability in terms of an oxide film is better than a Nb capacitor, the Ta-Nb alloy powder being a Ta-Nb alloy powder produced by a thermal CVD method, wherein a content of Nb is 1 to 50 mass %, and an average particle diameter of primary particles is 30 to 200 nm, preferably, a CV value per unit mass of the powder (?F·V/g) is 250 k?F·V/g or more, or further, a CV value per unit volume (?F·V/mm3) in terms of a molded body whose molding density ? (g/cm3) is ?c (g/cm3)=?0.012RNb+3.57, wherein RNb: Nb content (mass %) in an alloy, is 900 ?F·V/mm3 or more, and an anode element for a solid electrolytic capacitor using the alloy powder.
    Type: Application
    Filed: September 11, 2014
    Publication date: October 5, 2017
    Applicant: ISHIHARA CHEMICAL CO., LTD.
    Inventors: Takayuki MAESHIMA, Issei SATOH, Hisakazu SAKAI, Jun FURUTANI, Yoshihiko TAKATA, Tsukasa KONDO
  • Publication number: 20160104580
    Abstract: Method of producing Ta powder for tantalum solid electrolytic capacitor capable of stably providing CV value of more than 220 k and to provide the Ta powder and its Ta granulated powder. In method of producing Ta powder by vaporizing TaCl5 through heating and reducing with H2 gas, the reduction is performed under conditions that feeding rate of TaCl5 vapor passing through section area of reaction field of 1 cm2 for 1 minute is 0.05˜5.0 g/cm2·min and residence time of TaCl5 vapor in the reduction reaction field is 0.1˜5 seconds and reduction temperature of TaCl5 is 1100˜1600° C., whereby Ta powder including a single phase of ?-Ta of tetragonal system or mixed phase of ?-Ta and ?-Ta of cubic system and having average particle size of 30˜150 nm is obtained. Further, Ta granulated powder is obtained by granulating the Ta powder.
    Type: Application
    Filed: June 13, 2013
    Publication date: April 14, 2016
    Inventors: Takayuki MAESHIMA, Yasunori YONEHANA, Hisakazu SAKAI, Jyun FURUTANI, Issei SATOH
  • Patent number: 9184228
    Abstract: A composite base of the present invention includes a sintered base and a base surface flattening layer disposed on the sintered base, and the base surface flattening layer has a surface RMS roughness of not more than 1.0 nm. A composite substrate of the present invention includes the composite base and a semiconductor crystal layer disposed on a side of the composite base where the base surface flattening layer is located, and a difference between a thermal expansion coefficient of the sintered base and a thermal expansion coefficient of the semiconductor crystal layer is not more than 4.5×10?6K?1. Thereby, a composite substrate in which a semiconductor crystal layer is attached to a sintered base, and a composite base suitably used for that composite substrate are provided.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: November 10, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yuki Seki, Issei Satoh, Koji Uematsu, Yoshiyuki Yamamoto
  • Publication number: 20150118830
    Abstract: The present method of manufacturing a GaN-based film includes the steps of preparing a composite substrate (10) including a support substrate (11) dissoluble in hydrofluoric acid and a single crystal film (13) arranged on a side of a main surface (11m) of the support substrate (11), a coefficient of thermal expansion in the main surface (11m) of the support substrate (11) being more than 0.8 time and less than 1.2 times as high as a coefficient of thermal expansion of GaN crystal, forming a GaN-based film (20) on a main surface (13m) of the single crystal film (13) arranged on the side of the main surface (11m) of the support substrate (11), and removing the support substrate (11) by dissolving the support substrate (11) in hydrofluoric acid. Thus, the method of manufacturing a GaN-based film capable of efficiently obtaining a GaN-based film having a large main surface area, less warpage, and good crystallinity, as well as a composite substrate used therefor are provided.
    Type: Application
    Filed: January 5, 2015
    Publication date: April 30, 2015
    Inventors: Issei SATOH, Yuki SEKI, Koji UEMATSU, Yoshiyuki YAMAMOTO, Hideki MATSUBARA, Shinsuke FUJIWARA, Masashi YOSHIMURA
  • Patent number: 8962365
    Abstract: The present method of manufacturing a GaN-based film includes the steps of preparing a composite substrate including a support substrate dissoluble in hydrofluoric acid and a single crystal film arranged on a side of a main surface of the support substrate, a coefficient of thermal expansion in the main surface of the support substrate being more than 0.8 time and less than 1.2 times as high as a coefficient of thermal expansion of GaN crystal, forming a GaN-based film on a main surface of the single crystal film arranged on the side of the main surface of the support substrate, and removing the support substrate by dissolving the support substrate in hydrofluoric acid. Thus, the method of manufacturing a GaN-based film capable of efficiently obtaining a GaN-based film having a large main surface area, less warpage, and good crystallinity, as well as a composite substrate used therefor are provided.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: February 24, 2015
    Assignee: Sumitomo Electric Industies, Ltd.
    Inventors: Issei Satoh, Yuki Seki, Koji Uematsu, Yoshiyuki Yamamoto, Hideki Matsubara, Shinsuke Fujiwara, Masashi Yoshimura
  • Patent number: 8937339
    Abstract: Si(1-v-w-x)CwAlxNv crystals in a mixed crystal state are formed. A method for manufacturing an easily processable Si(1-v-w-x)CwAlxNv substrate, a method for manufacturing an epitaxial wafer, a Si(1-v-w-x)CwAlxNv substrate, and an epitaxial wafer are provided. A method for manufacturing a Si(1-v-w-x)CwAlxNv substrate 10a includes the following steps. First, a Si substrate 11 is prepared. A Si(1-v-w-x)CwAlxNv layer 12 (0<v<1, 0?w<1, 0<x<1, and 0<v+w+x<1) is then grown on the Si substrate 11 by a pulsed laser deposition method.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: January 20, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Issei Satoh, Michimasa Miyanaga, Shinsuke Fujiwara, Hideaki Nakahata
  • Patent number: 8748890
    Abstract: A method of manufacturing a semiconductor wafer of the present invention includes the steps of: obtaining a composite base by forming a base surface flattening layer having a surface RMS roughness of not more than 1.0 nm on a base; obtaining a composite substrate by attaching a semiconductor crystal layer to a side of the composite base where the base surface flattening layer is located; growing at least one semiconductor layer on the semiconductor crystal layer of the composite substrate; and obtaining the semiconductor wafer including the semiconductor crystal layer and the semiconductor layer by removing the base surface flattening layer by wet etching and thereby separating the semiconductor crystal layer from the base.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: June 10, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yuki Seki, Issei Satoh, Koji Uematsu, Yoshiyuki Yamamoto
  • Patent number: 8715414
    Abstract: There are provided a Si(1-v-w-x)CwAlxNv substrate that achieves high crystallinity and low costs, an epitaxial wafer, and manufacturing methods thereof. A method for manufacturing a Si(1-v-w-x)CwAlxNv substrate according to the present invention includes the steps of preparing a different type of substrate 11 and growing a Si(1-v-w-x)CwAlxNv layer having a main surface on the different type of substrate 11. The component ratio x+v at the main surface of the Si(1-v-w-x)CwAlxNv layer is 0<x+v<1. The component ratio x+v increases or decreases monotonically from the interface between the Si(1-v-w-x)CwAlxNv layer and the different type of substrate 11 to the main surface of the Si(1-v-w-x)CwAlxNv layer. The component ratio x+v at the interface between the Si(1-v-w-x)CwAlxNv layer and the different type of substrate 11 is closer to that of the material of the different type of substrate 11 than the component ratio x+v at the main surface of the Si(1-v-w-x)CwAlxNv layer.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: May 6, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Issei Satoh, Michimasa Miyanaga, Shinsuke Fujiwara, Hideaki Nakahata
  • Patent number: 8697550
    Abstract: The present method of manufacturing a GaN-based film includes the steps of preparing a composite substrate, the composite substrate including a support substrate in which a coefficient of thermal expansion in a main surface is more than 0.8 time and less than 1.2 times as high as a coefficient of thermal expansion of GaN crystal in a direction of a axis and a single crystal film arranged on a side of the main surface of the support substrate, the single crystal film having threefold symmetry with respect to an axis perpendicular to a main surface of the single crystal film, and forming a GaN-based film on the main surface of the single crystal film in the composite substrate. Thus, a method of manufacturing a GaN-based film capable of manufacturing a GaN-based film having a large main surface area and less warpage is provided.
    Type: Grant
    Filed: November 10, 2011
    Date of Patent: April 15, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Issei Satoh, Yuki Seki, Koji Uematsu, Yoshiyuki Yamamoto, Hideki Matsubara, Shinsuke Fujiwara, Masashi Yoshimura
  • Patent number: 8697564
    Abstract: A method of manufacturing a GaN-based film includes the steps of preparing a composite substrate, the composite substrate including a support substrate in which a coefficient of thermal expansion in its main surface is more than 0.8 time and less than 1.0 time as high as a coefficient of thermal expansion of GaN crystal in a direction of a axis and a single crystal film arranged on a main surface side of the support substrate, the single crystal film having threefold symmetry with respect to an axis perpendicular to a main surface of the single crystal film, and forming a GaN-based film on the main surface of the single crystal film in the composite substrate, the single crystal film in the composite substrate being an SiC film. Thus, a method of manufacturing a GaN-based film capable of manufacturing a GaN-based film having a large main surface area and less warpage without crack being produced in a substrate is provided.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: April 15, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shinsuke Fujiwara, Koji Uematsu, Yoshiyuki Yamamoto, Issei Satoh
  • Patent number: 8658527
    Abstract: A method of manufacturing a GaN-based film includes the steps of preparing a composite substrate, the composite substrate including a support substrate in which a coefficient of thermal expansion in its main surface is more than 0.8 time and less than 1.0 time as high as a coefficient of thermal expansion of GaN crystal in a direction of a axis and a single crystal film arranged on a main surface side of the support substrate, the single crystal film having threefold symmetry with respect to an axis perpendicular to a main surface of the single crystal film, and forming a GaN-based film on the main surface of the single crystal film in the composite substrate, the single crystal film in the composite substrate being an SiC film. Thus, a method of manufacturing a GaN-based film capable of manufacturing a GaN-based film having a large main surface area and less warpage without crack being produced in a substrate is provided.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: February 25, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shinsuke Fujiwara, Koji Uematsu, Yoshiyuki Yamamoto, Issei Satoh
  • Patent number: 8658517
    Abstract: The present method of manufacturing a GaN-based film includes the steps of preparing a composite substrate, the composite substrate including a support substrate in which a coefficient of thermal expansion in a main surface is more than 0.8 time and less than 1.2 times as high as a coefficient of thermal expansion of GaN crystal in a direction of a axis and a single crystal film arranged on a side of the main surface of the support substrate, the single crystal film having threefold symmetry with respect to an axis perpendicular to a main surface of the single crystal film, and forming a GaN-based film on the main surface of the single crystal film in the composite substrate. Thus, a method of manufacturing a GaN-based film capable of manufacturing a GaN-based film having a large main surface area and less warpage is provided.
    Type: Grant
    Filed: November 10, 2011
    Date of Patent: February 25, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Issei Satoh, Yuki Seki, Koji Uematsu, Yoshiyuki Yamamoto, Hideki Matsubara, Shinsuke Fujiwara, Masashi Yoshimura
  • Patent number: 8613802
    Abstract: Affords nitride semiconductor crystal manufacturing apparatuses that are durable and that are for manufacturing nitride semiconductor crystal in which the immixing of impurities from outside the crucible is kept under control, and makes methods for manufacturing such nitride semiconductor crystal, and the nitride semiconductor crystal itself, available. A nitride semiconductor crystal manufacturing apparatus (100) is furnished with a crucible (101), a heating unit (125), and a covering component (110). The crucible (101) is where, interiorly, source material (17) is disposed. The heating unit (125) is disposed about the outer periphery of the crucible (101), where it heats the crucible (101) interior. The covering component (110) is arranged in between the crucible (101) and the heating unit (125).
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: December 24, 2013
    Assignee: Sumitomo Electric Industies, Ltd.
    Inventors: Issei Satoh, Michimasa Miyanaga, Yoshiyuki Yamamoto, Hideaki Nakahata
  • Patent number: 8591653
    Abstract: A compound semiconductor single-crystal manufacturing device (1) is furnished with: a laser light source (6) making it possible to sublime a source material by directing a laser beam onto the material; a reaction vessel (2) having a laser entry window (5) through which the laser beam output from the laser light source (6) can be transmitted to introduce the beam into the vessel interior, and that is capable of retaining a starting substrate (3) where sublimed source material is recrystallized; and a heater (7) making it possible to heat the starting substrate (3). The laser beam is shone on, to heat and thereby sublime, the source material within the reaction vessel (2), and compound semiconductor single crystal is grown by recrystallizing the sublimed source material onto the starting substrate (3); afterwards the laser beam is employed to separate the compound semiconductor single crystal from the starting substrate (3).
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: November 26, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Issei Satoh, Naho Mizuhara, Keisuke Tanizaki, Michimasa Miyanaga, Takashi Sakurada, Hideaki Nakahata
  • Patent number: 8540817
    Abstract: There are provided a method for manufacturing a Si(1-v-w-x)CwAlxNv substrate having a reduced number of cracks and high processability, a method for manufacturing an epitaxial wafer, a Si(1-v-w-x)CwAlxNv substrate, and an epitaxial wafer. A method for manufacturing a Si(1-v-w-x)CwAlxNv substrate 10a includes the following steps. First, a Si substrate 11 is prepared. A Si(1-v-w-x)CwAlxNv layer (0<v<1, 0<w<1, 0<x<1, and 0<v+w+x<1) is then grown on the Si substrate at a temperature below 550° C.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: September 24, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Issei Satoh, Michimasa Miyanaga, Shinsuke Fujiwara, Hideaki Nakahata
  • Patent number: 8497185
    Abstract: A method of manufacturing a semiconductor wafer of the present invention includes the steps of: obtaining a composite base by forming a base surface flattening layer having a surface RMS roughness of not more than 1.0 nm on a base; obtaining a composite substrate by attaching a semiconductor crystal layer to a side of the composite base where the base surface flattening layer is located; growing at least one semiconductor layer on the semiconductor crystal layer of the composite substrate; and obtaining the semiconductor wafer including the semiconductor crystal layer and the semiconductor layer by removing the base surface flattening layer by wet etching and thereby separating the semiconductor crystal layer from the base.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: July 30, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yuki Seki, Issei Satoh, Koji Uematsu, Yoshiyuki Yamamoto