Patents by Inventor Issei Yamamoto

Issei Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110222197
    Abstract: An ESD protection device is manufactured such that its ESD characteristics are easily adjusted and stabilized. The ESD protection device includes an insulating substrate, a cavity provided in the insulating substrate, at least one pair of discharge electrodes each including a portion exposed in the cavity, the exposed portions being arranged to face each other, and external electrodes provided on a surface of the insulating substrate and connected to the at least one pair of discharge electrodes.
    Type: Application
    Filed: May 23, 2011
    Publication date: September 15, 2011
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Jun ADACHI, Jun URAKAWA, Issei YAMAMOTO
  • Publication number: 20110216456
    Abstract: An ESD protection device is constructed such that its ESD characteristics are easily adjusted and stabilized and degradation of discharge characteristics caused by repetitive discharges is reliably prevented.
    Type: Application
    Filed: May 20, 2011
    Publication date: September 8, 2011
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Issei YAMAMOTO, Jun ADACHI, Akihiko KAMADA
  • Publication number: 20110124369
    Abstract: [Object] To provide a portable terminal device accepting an input operation in accordance with acceleration, which is less prone to cause incorrect input and allows a user to perform easily an input operation. [Constitution] A mobile phone includes an acceleration sensor 13 for detecting acceleration produced on a mobile phone main body; a cumulative value calculating section 100a for calculating a cumulative value of detected acceleration; a comparing section 100b for comparing the cumulative value with a threshold value; and a CPU 100 for controlling a security lock mode in accordance with a result of comparison by the comparing section 100b. When the cumulative value has exceeded the threshold value by a user shaking the mobile phone, the CPU 100 cancels the security lock mode.
    Type: Application
    Filed: July 28, 2009
    Publication date: May 26, 2011
    Applicant: KYOCERA CORPORATION
    Inventor: Issei Yamamoto
  • Patent number: 7736830
    Abstract: A method for forming circuit patterns having different resistances. The method includes (1) a first step of forming a first toner image using a first toner and a second toner image using a second toner, each by electrophotography, the first toner containing a resistive material, the second toner having a resistance different from that of the first toner; and (2) a second step of transferring and fixing the first toner image and the second toner image to an object to be printed such as a ceramic green sheet, to form a circuit pattern.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: June 15, 2010
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Akihiko Kamada, Norio Sakai, Issei Yamamoto
  • Publication number: 20080305425
    Abstract: A method for forming circuit patterns having different resistances. The method includes (1) a first step of forming a first toner image using a first toner and a second toner image using a second toner, each by electrophotography, the first toner containing a resistive material, the second toner having a resistance different from that of the first toner; and (2) a second step of transferring and fixing the first toner image and the second toner image to an object to be printed such as a ceramic green sheet, to form a circuit pattern.
    Type: Application
    Filed: August 26, 2008
    Publication date: December 11, 2008
    Inventors: Akihiko Kamada, Norio Sakai, Issei Yamamoto