Patents by Inventor Ivan Eliashevich

Ivan Eliashevich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7842547
    Abstract: In a method for fabricating a flip-chip light emitting diode device, epitaxial layers are deposited on a sapphire growth substrate to produce an epitaxial wafer. A plurality of light emitting diode devices are fabricated on the epitaxial wafer. The epitaxial wafer is diced to generate a device die. The device die is flip chip bonded to a mount. The flip chip bonding includes securing the device die to the mount by bonding at least one electrode of the device die to at least one bonding pad of the mount. Subsequent to the flip chip bonding, the growth substrate of the device die is removed via the application of laser light.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: November 30, 2010
    Assignee: Lumination LLC
    Inventors: Bryan S. Shelton, Sebastien Libon, Ivan Eliashevich
  • Publication number: 20100181584
    Abstract: A light emitting device includes a stack of semiconductor layers defining a light emitting pn junction and a dielectric layer disposed over the stack of semiconductor layers. The dielectric layer has a refractive index substantially matching a refractive index of the stack of semiconductor layers. The dielectric layer has a principal surface distal from the stack of semiconductor layers. The distal principal surface includes patterning, roughening, or texturing configured to promote extraction of light generated in the stack of semiconductor layers.
    Type: Application
    Filed: July 11, 2006
    Publication date: July 22, 2010
    Inventors: Xiang Gao, Hari S. Venugopalan, Michael Sackrison, Ivan Eliashevich
  • Patent number: 7667236
    Abstract: A light emitting device (A) includes a semiconductor die (100).
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: February 23, 2010
    Assignee: Lumination LLC
    Inventors: Ivan Eliashevich, Hari Venugopalan, Xiang Gao, Michael J. Sackrison
  • Patent number: 7635869
    Abstract: In a light emitting device, a light emitting chip (12, 112) includes a stack of semiconductor layers (14) and an electrode (24, 141, 142) disposed on the stack of semiconductor layers. A support (10, 10?, 110, 210) has a generally planar surface (30) supporting the light emitting chip in a flip-chip fashion. An electrically conductive chip attachment material (40, 41, 141, 142) is recessed into the generally planar surface of the support such that the attachment material does not protrude substantially above the generally planar surface of the support. The attachment material provides electrical communication between the electrode of the light emitting chip and an electrically conductive path (36, 36?) of the support. Optionally, at least the stack of semiconductor layers and the electrode of the light emitting chip are also recessed into the generally planar surface of the support.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: December 22, 2009
    Assignee: Lumination LLC
    Inventors: Boris Kolodin, Michael Hsing, Stanton Earl Weaver, Jr., Ivan Eliashevich, Srinath K. Aanegola
  • Publication number: 20090155958
    Abstract: Systems and methods are provided to mitigate excess die attachment material accrual, and parasitic conductive paths formed thereby. A die attachment material (e.g., solder) is melted using a combination of localized heat sources and ultrasonic energy. The heat sources bring the die attachment material close to its melting point, which reduces an amount of bonding force associated with purely ultrasonic bonding techniques. An ultrasonic transducer brings the die attachment material the rest of the way up to its melting point, which reduces the overall temperature that the die and/or sensitive components thereon endure during the bonding process.
    Type: Application
    Filed: December 13, 2007
    Publication date: June 18, 2009
    Inventors: Boris Kolodin, Xiang Gao, Ivan Eliashevich, Stanton E. Weaver, JR.
  • Patent number: 7456035
    Abstract: In a method for fabricating a flip-chip light emitting diode device, epitaxial layers (14, 114) are deposited on a growth substrate (16, 116) to produce an epitaxial wafer. A plurality of light emitting diode devices are fabricated on the epitaxial wafer. The epitaxial wafer is diced to generate a device die (10, 110). The device die (10, 110) is flip chip bonded to a mount (12, 112). The flip chip bonding includes securing the device die (10, 110) to the mount (12, 112) by bonding at least one electrode (20, 22, 120) of the device die (10, 110) to at least one bonding pad (26, 28, 126) of the mount (12, 112). Subsequent to the flip chip bonding, a thickness of the growth substrate (16, 116) of the device die (10, 110) is reduced.
    Type: Grant
    Filed: July 27, 2004
    Date of Patent: November 25, 2008
    Assignee: Lumination LLC
    Inventors: Ivan Eliashevich, Boris Kolodin, Emil P. Stefanov
  • Publication number: 20080145960
    Abstract: First and second light emitting diode (LED) arrays, which each includes a corresponding number of LED dies, are disposed on a substrate proximately and substantially parallel to one another. Each pair of substantially paralleled LED dies of the first and second arrays is covered by substantially transparent optical encapsulant. The optical encapsulant is one of covered by a reflective layer for a UV to visible spectral region and shaped for total internal light reflection. The substrate is diced along an axis extending in parallel and between the first and second LED arrays.
    Type: Application
    Filed: December 15, 2006
    Publication date: June 19, 2008
    Inventors: Boris Kolodin, Ivan Eliashevich, Chen-Lun Hsing Chen, Stanton E. Weaver
  • Publication number: 20080113460
    Abstract: In a method for fabricating a flip-chip light emitting diode device, epitaxial layers are deposited on a sapphire growth substrate to produce an epitaxial wafer. A plurality of light emitting diode devices are fabricated on the epitaxial wafer. The epitaxial wafer is diced to generate a device die. The device die is flip chip bonded to a mount. The flip chip bonding includes securing the device die to the mount by bonding at least one electrode of the device die to at least one bonding pad of the mount. Subsequent to the flip chip bonding, the growth substrate of the device die is removed via the application of laser light.
    Type: Application
    Filed: December 21, 2004
    Publication date: May 15, 2008
    Inventors: Bryan S. Shelton, Sebastien Libon, Ivan Eliashevich
  • Patent number: 7358539
    Abstract: A flip chip light emitting diode die (12) includes a light-transmissive substrate (20) and a plurality of semiconductor layers (22) are disposed on the light-transmissive substrate (20). The semiconductor layers (22) define a light-generating p/n junction. An electrode (30) is formed on the semiconductor layers (22) for flip-chip bonding the diode die (12) to an associated mount (14). The electrode (30) includes an optically transparent layer (42) formed of a substantially optically transparent material adjacent to the semiconductor layers (22) that makes ohmic contact therewith, and a reflective layer (44) adjacent to the optically transparent layer (42) and in electrically conductive communication therewith.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: April 15, 2008
    Assignee: Lumination LLC
    Inventors: Hari S. Venugopalan, Ivan Eliashevich
  • Publication number: 20080067537
    Abstract: In a light emitting device, a light emitting chip (12, 112) includes a stack of semiconductor layers (14) and an electrode (24, 141, 142) disposed on the stack of semiconductor layers. A support (10, 10?, 110, 210) has a generally planar surface (30) supporting the light emitting chip in a flip-chip fashion. An electrically conductive chip attachment material (40, 41, 141, 142) is recessed into the generally planar surface of the support such that the attachment material does not protrude substantially above the generally planar surface of the support. The attachment material provides electrical communication between the electrode of the light emitting chip and an electrically conductive path (36, 36?) of the support. Optionally, at least the stack of semiconductor layers and the electrode of the light emitting chip are also recessed into the generally planar surface of the support.
    Type: Application
    Filed: September 14, 2006
    Publication date: March 20, 2008
    Inventors: Boris Kolodin, Michael Hsing, Stanton Earl Weaver, Ivan Eliashevich, Srinath K. Aanegola
  • Publication number: 20080035947
    Abstract: A surface mount light emitting package includes a chip carrier having top and bottom principal surfaces. At least one light emitting chip is attached to the top principal surface of the chip carrier. A lead frame attached to the top principal surface of the chip carrier. When surface mounted to an associated support, the bottom principal surface of the chip carrier is in thermal contact with the associated support without the lead frame intervening therebetween.
    Type: Application
    Filed: December 9, 2004
    Publication date: February 14, 2008
    Inventors: Stanton Earl Weaver Jr., Chen-Lun Hsing Chen, Boris Kolodin, Thomas Elliot Stecher, James Reginelli, Deborah Ann Haitko, Xiang Gao, Ivan Eliashevich
  • Patent number: 7285801
    Abstract: A light emitting semiconductor device die (10, 110, 210, 310) includes an electrically insulating substrate (12, 112). First and second spatially separated electrodes (60, 62, 260, 262, 360, 362) are disposed on the electrically insulating substrate. The first and second electrodes define an electrical current flow direction directed from the first electrode to the second electrode. A plurality of light emitting diode mesas (30, 130, 130?, 230, 330) are disposed on the substrate between the first and second spatially separated electrodes. Electrical series interconnections (50, 150, 250, 350) are disposed on the substrate between neighboring light emitting diode mesas. Each series interconnection carries electrical current flow between the neighboring mesas in the electrical current flow direction.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: October 23, 2007
    Assignee: Lumination, LLC
    Inventors: Ivan Eliashevich, Chris Bohler, Bryan S. Shelton, Hari S. Venugopalan, Xiang Gao
  • Publication number: 20070236956
    Abstract: At least two light emitting diodes emit a non-parallel light beam. A condensing system, operationally coupled with the light emitting diodes, receives the emitted non-parallel light beam and converts the received non-parallel light beam into a parallel light beam. A non-imaging concentrator includes an input surface which collects the parallel light beam, and an output surface, which includes phosphor material and outputs light.
    Type: Application
    Filed: March 31, 2006
    Publication date: October 11, 2007
    Inventors: Boris Kolodin, Shawn Du, Emil Radkov, Mark Mayer, Ivan Eliashevich
  • Publication number: 20070145379
    Abstract: A light emitting device (A) includes a semiconductor die (100).
    Type: Application
    Filed: December 22, 2004
    Publication date: June 28, 2007
    Inventors: Ivan Eliashevich, Hari Venugopalan, Xiang Gao, Michael Sackrison
  • Publication number: 20070114557
    Abstract: A light emitting diode (10) has a backside and a front-side with at least one n-type electrode (14) and at least one p-type electrode (12) disposed thereon defining a minimum electrodes separation (delectrodes). A bonding pad layer (50) includes at least one n-type bonding pad (64) and at least one p-type bonding pad (62) defining a minimum bonding pads separation (dpads) that is larger than the minimum electrodes separation (delectrodes). At least one fanning layer (30) interposed between the front-side of the light emitting diode (10) and the bonding pad layer (50) includes a plurality of electrically conductive paths passing through vias (34, 54) of a dielectric layer (32, 52) to provide electrical communication between the at least one n-type electrode (14) and the at least one n-type bonding pad (64) and between the at least one p-type electrode (12) and the at least one p-type bonding pad (62).
    Type: Application
    Filed: January 16, 2007
    Publication date: May 24, 2007
    Inventors: Bryan Shelton, Sebastien Libon, Hari Venugopalan, Ivan Eliashevich, Stanton Weaver, Chen-Lun Chen, Thomas Soules, Steven LeBoeuf, Stephen Arthur
  • Publication number: 20070096120
    Abstract: An LED device (90) includes: an epitaxial structure (100) having a plurality of layers of semiconductor material and forming an active light-generating region (120) which generates light in response to electrical power being supplied to the LED device (90); and, a substrate (200) that is substantially transparent in a wavelength range corresponding to the light generated by the active light-generating region (120). The substrate has first and second opposing end faces (202, 206) and a plurality of side walls (210) extending therebetween, including a first side wall having a first portion thereof that defines a first surface (212, 214, 216, 218) which is not substantially normal to the first face (202) of the substrate (200). The epitaxial structure (100) is disposed on the first face (202) of the substrate (200).
    Type: Application
    Filed: October 27, 2005
    Publication date: May 3, 2007
    Inventors: Ivan Eliashevich, Hari Venugopalan, Emil Stefanov, Xian-An Cao, Bryan Shelton
  • Patent number: 7190005
    Abstract: A light-emitting element (24) is disclosed. A light emitting diode (LED) includes a sapphire substrate (26) having front and back sides (33, 35), and a plurality of semiconductor layers (28, 30, 32) deposited on the front side (33) of the sapphire substrate (26). The semiconductor layers (28, 30, 32) define a light-emitting structure that emits light responsive to an electrical input. A metallization stack (40) includes an adhesion layer (34) deposited on the back side (35) of the sapphire substrate (26), and a solderable layer (38) connected to the adhesion layer (34) such that the solderable layer (38) is secured to the sapphire substrate (26) by the adhesion layer (34). A support structure (42) is provided on which the LED is disposed. A solder bond (44) is arranged between the LED and the support structure (42). The solder bond (44) secures the LED to the support structure (42).
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: March 13, 2007
    Assignee: GELcore, LLC
    Inventors: Shawn R. Gibb, Robert F. Karlicek, Prosanto K. Mukerji, Hari S. Venugopalan, Ivan Eliashevich
  • Patent number: 7179670
    Abstract: A light emitting diode (10) has a backside and a front-side with at least one n-type electrode (14) and at least one p-type electrode (12) disposed thereon defining a minimum electrodes separation (delectrodes). A bonding pad layer (50) includes at least one n-type bonding pad (64) and at least one p-type bonding pad (62) defining a minimum bonding pads separation (dpads) that is larger than the minimum electrodes separation (delectrodes). At least one fanning layer (30) interposed between the front-side of the light emitting diode (10) and the bonding pad layer (50) includes a plurality of electrically conductive paths passing through vias (34, 54) of a dielectric layer (32, 52) to provide electrical communication between the at least one n-type electrode (14) and the at least one n-type bonding pad (64) and between the at least one p-type electrode (12) and the at least one p-type bonding pad (62).
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: February 20, 2007
    Assignee: GELcore, LLC
    Inventors: Bryan S. Shelton, Sebastien Libon, Hari S. Venugopalan, Ivan Eliashevich, Stanton E. Weaver, Jr., Chen-Lun Hsing Chen, Thomas F. Soules, Steven LeBoeuf, Stephen Arthur
  • Publication number: 20070004088
    Abstract: In a light emitting package fabrication process, a plurality of light emitting chips (10) are attached on a sub-mount wafer (14). The attached light emitting chips (10) are encapsulated. Fracture-initiating trenches (30, 32) are laser cut into the sub-mount wafer (14) between the attached light emitting chips (10) using a laser. The sub-mount wafer (14) is fractured along the fracture initiating trenches (30, 32).
    Type: Application
    Filed: July 7, 2006
    Publication date: January 4, 2007
    Inventors: Michael Sackrison, Xiang Gao, Bryan Shelton, Ivan Eliashevich
  • Patent number: 7115896
    Abstract: A nitride semiconductor is grown on a silicon substrate by depositing a few mono-layers of aluminum to protect the silicon substrate from ammonia used during the growth process, and then forming a nucleation layer from aluminum nitride and a buffer structure including multiple superlattices of AlRGa(1-R)N semiconductors having different compositions and an intermediate layer of GaN or other Ga-rich nitride semiconductor. The resulting structure has superior crystal quality. The silicon substrate used in epitaxial growth is removed before completion of the device so as to provide superior electrical properties in devices such as high-electron mobility transistors.
    Type: Grant
    Filed: November 25, 2003
    Date of Patent: October 3, 2006
    Assignee: Emcore Corporation
    Inventors: Shiping Guo, David Gotthold, Milan Pophristic, Boris Peres, Ivan Eliashevich, Bryan S. Shelton, Alex D. Ceruzzi, Michael Murphy, Richard A. Stall