Patents by Inventor Ivan L. Berry

Ivan L. Berry has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200090956
    Abstract: A device for processing wafer-shaped articles comprises a closed process chamber that provides a gas-tight enclosure. A rotary chuck is located within the closed process chamber. A heater is positioned relative to the chuck so as to heat a wafer shaped article held on the chuck from one side only and without contacting the wafer shaped article. The heater emits radiation having a maximum intensity in a wavelength range from 390 nm to 550 nm. At least one first liquid dispenser is positioned relative to the chuck so as to dispense a process liquid onto a side of a wafer shaped article that is opposite the side of the wafer-shaped article facing the heater.
    Type: Application
    Filed: November 22, 2019
    Publication date: March 19, 2020
    Inventors: Rainer Obweger, Andreas Gleissner, Thomas Wirnsberger, Franz Kumnig, Alessandro Baldaro, Christian Fischer, Mu Hung Chou, Rafal Ryszard Dylewicz, Nathan Lavdovsky, Ivan L. Berry
  • Patent number: 10580628
    Abstract: One process used to remove material from a surface is ion etching. In certain cases, ion etching involves delivery of both ions and a reactive gas to a substrate. The disclosed embodiments permit local high pressure delivery of reactive gas to a substrate while maintaining a much lower pressure on portions of the substrate that are outside of the local high pressure delivery area. In many cases, the low pressure is achieved by providing an injection head that confines the high pressure reactant delivery to a small area and vacuums away excess reactants and byproducts as they leave this small area and before they enter the larger substrate processing region. The disclosed injection head may be used to increase throughput while minimizing deleterious collisions between ions and other species present in the substrate processing region. The disclosed injection head may also be used in other types of semiconductor wafer processing.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: March 3, 2020
    Assignee: Lam Research Corporation
    Inventors: Ivan L. Berry, III, Thorsten Lill, Kenneth Reese Reynolds
  • Patent number: 10490426
    Abstract: A device for processing wafer-shaped articles comprises a closed process chamber that provides a gas-tight enclosure. A rotary chuck is located within the closed process chamber. A heater is positioned relative to the chuck so as to heat a wafer shaped article held on the chuck from one side only and without contacting the wafer shaped article. The heater emits radiation having a maximum intensity in a wavelength range from 390 nm to 550 nm. At least one first liquid dispenser is positioned relative to the chuck so as to dispense a process liquid onto a side of a wafer shaped article that is opposite the side of the wafer-shaped article facing the heater.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: November 26, 2019
    Assignee: LAM RESEARCH AG
    Inventors: Rainer Obweger, Andreas Gleissner, Thomas Wirnsberger, Franz Kumnig, Alessandro Baldaro, Christian Thomas Fischer, Mu Hung Chou, Rafal Ryszard Dylewicz, Nathan Lavdovsky, Ivan L. Berry, III
  • Patent number: 10483085
    Abstract: Various embodiments herein relate to methods and apparatus for performing anisotropic ion beam etching to form arrays of channels. The channels may be formed in semiconductor material, and may be used in a gate-all-around device. Generally speaking, a patterned mask layer is provided over a layer of semiconductor material. Ions are directed toward the substrate while the substrate is positioned in two particular orientations with respect to the ion trajectory. The substrate switches between these orientations such that ions impinge upon the substrate from two opposite angles. The patterned mask layer shadows/protects the underlying semiconductor material such that the channels are formed in intersecting shadowed regions.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: November 19, 2019
    Assignee: Lam Research Corporation
    Inventors: Ivan L. Berry, III, Thorsten Lill
  • Publication number: 20190340316
    Abstract: Etch in a thermal etch reaction is predicted using a machine learning model. Chemical characteristics of an etch process and associated energies in one or more reaction pathways of a given thermal etch reaction are identified using a quantum mechanical simulation. Labels indicative of etch characteristics may be associated with the chemical characteristics and associated energies of the given thermal etch reaction. The machine learning model can be trained using chemical characteristics and associated energies as independent variables and labels as dependent variables across many different etch reactions of different types. When chemical characteristics and associated energies for a new thermal etch reaction are provided as inputs in the machine learning model, the machine learning model can accurately predict etch characteristics of the new thermal etch reaction as outputs.
    Type: Application
    Filed: May 3, 2018
    Publication date: November 7, 2019
    Inventors: Thorsten Lill, Andreas Fischer, Ivan L. Berry, III, Nerissa Sue Draeger, Richard A. Gottscho
  • Publication number: 20190237298
    Abstract: Various embodiments herein relate to methods and apparatus for etching feature on a substrate. In a number of embodiments, no substrate rotation or tilting is used. While conventional etching processes rely on substrate rotation to even out the distribution of ions over the substrate surface, various embodiments herein achieve this purpose by moving the ion beams relative to the ion source. Movement of the ion beams can be achieved in a number of ways including electrostatic techniques, mechanical techniques, magnetic techniques, and combinations thereof.
    Type: Application
    Filed: April 15, 2019
    Publication date: August 1, 2019
    Inventors: Ivan L. Berry, III, Thorsten Lill
  • Publication number: 20180233662
    Abstract: A method for processing a substrate including a magnetoresistive random access memory (MRAM) stack includes providing a substrate including the MRAM stack and creating a first mask layer on a surface of the MRAM stack. The first mask layer defines a first mask pattern including a first plurality of spaced mask lines extending in a first direction across the surface of the MRAM stack and first spaces located between the first plurality of spaced mask lines. The method further includes performing ion beam etching in the first direction in the first spaces located between the first plurality of spaced mask lines to remove material of the MRAM stack located below the first spaces.
    Type: Application
    Filed: February 12, 2018
    Publication date: August 16, 2018
    Inventors: Ivan L. Berry, III, Thorsten Lill
  • Publication number: 20180166304
    Abstract: The embodiments herein relate to methods and apparatus for performing ion etching on a semiconductor substrate, as well as methods for forming such apparatus. In some embodiments, an electrode assembly may be fabricated, the electrode assembly including a plurality of electrodes having different purposes, with each electrode secured to the next in a mechanically stable manner. Apertures may be formed in each electrode after the electrodes are secured together, thereby ensuring that the apertures are well-aligned between neighboring electrodes. In some cases, the electrodes are made from degeneratively doped silicon, and the electrode assembly is secured together through electrostatic bonding. Other electrode materials and methods of securing may also be used. The electrode assembly may include a hollow cathode emitter electrode in some cases, which may have a frustoconical or other non-cylindrical aperture shape. A chamber liner and/or reflector may also be present in some cases.
    Type: Application
    Filed: January 25, 2018
    Publication date: June 14, 2018
    Inventors: Ivan L. Berry, III, Thorsten Lill
  • Publication number: 20180158692
    Abstract: Apparatuses for processing substrates are provided herein. Apparatuses include a plasma etch chamber having a showerhead and pedestal for holding a substrate having silicon nitride, at least one outlet for coupling to a vacuum, a solid non-functional silicon source, and a plasma generator. A solid silicon source may be upstream of a substrate, such as at or near a showerhead of a process chamber, or in a remote plasma generator. Apparatuses also include a plasma etch chamber, at least one outlet, a solid non-functional silicon source, a plasma generator, and a controller for controlling operations including instructions for causing introduction of a fluorinating gas and causing ignition of a plasma to form fluorine-containing etching species in the plasma etch chamber.
    Type: Application
    Filed: January 23, 2018
    Publication date: June 7, 2018
    Inventors: Helen H. Zhu, Linda Marquez, Faisal Yaqoob, Pilyeon Park, Ivan L. Berry, III, Ivelin A. Angelov, Joon Hong Park
  • Patent number: 9916993
    Abstract: The embodiments herein relate to methods and apparatus for performing ion etching on a semiconductor substrate, as well as methods for forming such apparatus. In some embodiments, an electrode assembly may be fabricated, the electrode assembly including a plurality of electrodes having different purposes, with each electrode secured to the next in a mechanically stable manner. Apertures may be formed in each electrode after the electrodes are secured together, thereby ensuring that the apertures are well-aligned between neighboring electrodes. In some cases, the electrodes are made from degeneratively doped silicon, and the electrode assembly is secured together through electrostatic bonding. Other electrode materials and methods of securing may also be used. The electrode assembly may include a hollow cathode emitter electrode in some cases, which may have a frustoconical or other non-cylindrical aperture shape. A chamber liner and/or reflector may also be present in some cases.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: March 13, 2018
    Assignee: Lam Research Corporation
    Inventors: Ivan L. Berry, III, Thorsten Lill
  • Patent number: 9911620
    Abstract: Methods of selectively etching silicon nitride on a semiconductor substrate by providing silicon to the plasma to achieve high etch selectivity of silicon nitride to silicon-containing materials are provided. Methods involve providing silicon from a solid or fluidic silicon source or both. A solid silicon source may be upstream of a substrate, such as at or near a showerhead of a process chamber, or in a remote plasma generator. A silicon gas source may be flowed to the plasma during etch.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: March 6, 2018
    Assignee: Lam Research Corporation
    Inventors: Helen H. Zhu, Linda Marquez, Faisal Yaqoob, Pilyeon Park, Ivan L. Berry, III, Ivelin A. Angelov, Joon Hong Park
  • Publication number: 20180047548
    Abstract: One process used to remove material from a surface is ion etching. In certain cases, ion etching involves delivery of both ions and a reactive gas to a substrate. The disclosed embodiments permit local high pressure delivery of reactive gas to a substrate while maintaining a much lower pressure on portions of the substrate that are outside of the local high pressure delivery area. In many cases, the low pressure is achieved by providing an injection head that confines the high pressure reactant delivery to a small area and vacuums away excess reactants and byproducts as they leave this small area and before they enter the larger substrate processing region. The disclosed injection head may be used to increase throughput while minimizing deleterious collisions between ions and other species present in the substrate processing region. The disclosed injection head may also be used in other types of semiconductor wafer processing.
    Type: Application
    Filed: October 25, 2017
    Publication date: February 15, 2018
    Inventors: Ivan L. Berry, III, Thorsten Lill, Kenneth Reese Reynolds
  • Publication number: 20170372911
    Abstract: The embodiments herein relate to methods and apparatus for etching features in semiconductor substrates. In a number of cases, the features may be etched while forming a spin-torque-transfer random access memory (STT-RAM) device. In various embodiments, the substrate may be cooled to a low temperature via a cooled substrate support during particular processing steps. The cooled substrate support may have beneficial impacts in terms of reducing the degree of diffusion-related damage in a resulting device. Further, the use of a non-cooled substrate support during certain other processing steps can likewise have beneficial impacts in terms of reducing diffusion-related damage, depending on the particular step. In some implementations, the cooled substrate support may be used in a process to preferentially deposit a material (in some cases a reactant) on certain portions of the substrate. The disclosed embodiments may be used to achieve high quality anisotropic etching results.
    Type: Application
    Filed: August 21, 2017
    Publication date: December 28, 2017
    Inventors: Thorsten Lill, Ivan L. Berry, III, Anthony Ricci
  • Patent number: 9837254
    Abstract: One process that may be used to remove material from a surface is ion etching. In certain cases, ion etching involves delivery of both ions and a reactive gas to a substrate. The disclosed embodiments permit local high pressure delivery of reactive gas to a substrate while maintaining a much lower pressure on portions of the substrate that are outside of the local high pressure delivery area. The low pressure is achieved by confining the high pressure reactant delivery to a small area and vacuuming away excess reactants and byproducts as they leave this small area and before they enter the larger substrate processing region. The disclosed techniques may be used to increase throughput while minimizing deleterious collisions between ions and other species present in the substrate processing region.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: December 5, 2017
    Assignee: Lam Research Corporation
    Inventors: Ivan L. Berry, III, Thorsten Lill, Kenneth Reese Reynolds
  • Publication number: 20170330788
    Abstract: One system includes a chamber, a chuck assembly, and an ion source. The chuck assembly includes a substrate support and a precession assembly with a center support coupled to a stationary center point of an under region of the substrate support. The precession assembly includes first and second actuators connected to first and second locations, respectively, that are in the under region off-set from the center point. The precession assembly imparts a precession motion to the substrate support when the first actuator and the second actuator move up and down relative to the center support, and the precession motion imparted to the substrate causes a rotating tilt of the substrate support without rotation of the substrate support. The rotating tilt of the substrate is configured to cause ions generated by the ion source to impinge upon a surface of the substrate in continually varying angles of incidence.
    Type: Application
    Filed: August 1, 2017
    Publication date: November 16, 2017
    Inventors: Ivelin Angelov, Ivan L. Berry, III
  • Patent number: 9812349
    Abstract: One system includes a chamber, a chuck assembly, and an ion source. The chuck assembly includes a substrate support and a precession assembly with a center support coupled to a stationary center point of an under region of the substrate support. The precession assembly includes first and second actuators connected to first and second locations, respectively, that are in the under region off-set from the center point. The precession assembly imparts a precession motion to the substrate support when the first actuator and the second actuator move up and down relative to the center support, and the precession motion imparted to the substrate causes a rotating tilt of the substrate support without rotation of the substrate support. The rotating tilt of the substrate is configured to cause ions generated by the ion source to impinge upon a surface of the substrate in continually varying angles of incidence.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: November 7, 2017
    Assignee: Lam Research Corporation
    Inventors: Ivelin Angelov, Ivan L. Berry, III
  • Patent number: 9779955
    Abstract: The embodiments herein relate to methods and apparatus for etching features in semiconductor substrates. In a number of cases, the features may be etched while forming a spin-torque-transfer random access memory (STT-RAM) device. In various embodiments, the substrate may be cooled to a low temperature via a cooled substrate support during particular processing steps. The cooled substrate support may have beneficial impacts in terms of reducing the degree of diffusion-related damage in a resulting device. Further, the use of a non-cooled substrate support during certain other processing steps can likewise have beneficial impacts in terms of reducing diffusion-related damage, depending on the particular step. In some implementations, the cooled substrate support may be used in a process to preferentially deposit a material (in some cases a reactant) on certain portions of the substrate. The disclosed embodiments may be used to achieve high quality anisotropic etching results.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: October 3, 2017
    Assignee: Lam Research Corporation
    Inventors: Thorsten Lill, Ivan L. Berry, III, Anthony Ricci
  • Publication number: 20170250087
    Abstract: The embodiments herein relate to methods and apparatus for etching features in semiconductor substrates. In a number of cases, the features may be etched while forming a spin-torque-transfer random access memory (STT-RAM) device. In various embodiments, the substrate may be cooled to a low temperature via a cooled substrate support during particular processing steps. The cooled substrate support may have beneficial impacts in terms of reducing the degree of diffusion-related damage in a resulting device. Further, the use of a non-cooled substrate support during certain other processing steps can likewise have beneficial impacts in terms of reducing diffusion-related damage, depending on the particular step. In some implementations, the cooled substrate support may be used in a process to preferentially deposit a material (in some cases a reactant) on certain portions of the substrate. The disclosed embodiments may be used to achieve high quality anisotropic etching results.
    Type: Application
    Filed: February 25, 2016
    Publication date: August 31, 2017
    Inventors: Thorsten Lill, Ivan L. Berry, III, Anthony Ricci
  • Patent number: 9740104
    Abstract: Systems and methods for processing a substrate include exposing a substrate to UV light from a UV light source having a predetermined wavelength range. The substrate includes a photoresist layer that has been bombarded with ions. The method includes controlling a temperature of the substrate, while exposing the substrate to the UV light, to a temperature less than or equal to a first temperature. The method includes removing the photoresist layer using plasma while maintaining a temperature of the substrate to less than or equal to a strip process temperature after exposing the substrate to the UV light.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: August 22, 2017
    Assignee: Lam Research Corporation
    Inventors: Ivan L. Berry, III, Glen Gilchrist
  • Publication number: 20170170018
    Abstract: Well-controlled, conformal doping of semiconductor substrates may be achieved by low temperature hydrogen-containing plasma treatment prior to gas phase doping. Substrates doped in this manner may be capped and annealed for thermal drive-in of the dopant. The technique is particularly applicable to the formation of ultrashallow junctions (USJs) in three-dimensional (3D) semiconductor structures, such as FinFET and Gate-All-Around (GAA) devices.
    Type: Application
    Filed: December 14, 2015
    Publication date: June 15, 2017
    Inventors: Yunsang Kim, Youn Gi Hong, Ivan L. Berry, III