Abstract: A power supply controller having a shortened reset time due to a small hiccup voltage includes an electrical circuit providing a repeated voltage hiccup of a supply voltage of the controller of a switched-mode power supply (SMPS) when the controller enters a latched state. A plurality of comparators each have an input coupled with the controller supply voltage. A multiplexer and two latches are included, each coupled with one or more comparator outputs, and a restart controller is coupled with an output of one of the latches. The restart controller in various implementations toggles a switch to activate and deactivate a current sink to create the supply voltage hiccup. In other implementations, the switch is excluded and the restart controller toggles a voltage startup transistor to couple and decouple a voltage source with the supply voltage to create the voltage hiccup.

Abstract: A power supply controller having a shortened reset time due to a small hiccup voltage includes an electrical circuit providing a repeated voltage hiccup of a supply voltage of the controller of a switched-mode power supply (SMPS) when the controller enters a latched state. A plurality of comparators each have an input coupled with the controller supply voltage. A multiplexer and two latches are included, each coupled with one or more comparator outputs, and a restart controller is coupled with an output of one of the latches. The restart controller in various implementations toggles a switch to activate and deactivate a current sink to create the supply voltage hiccup. In other implementations, the switch is excluded and the restart controller toggles a voltage startup transistor to couple and decouple a voltage source with the supply voltage to create the voltage hiccup.

Abstract: A power supply controller having a shortened reset time due to a small hiccup voltage includes an electrical circuit providing a repeated voltage hiccup of a supply voltage of the controller of a switched-mode power supply (SMPS) when the controller enters a latched state. A plurality of comparators each have an input coupled with the controller supply voltage. A multiplexer and two latches are included, each coupled with one or more comparator outputs, and a restart controller is coupled with an output of one of the latches. The restart controller in various implementations toggles a switch to activate and deactivate a current sink to create the supply voltage hiccup. In other implementations, the switch is excluded and the restart controller toggles a voltage startup transistor to couple and decouple a voltage source with the supply voltage to create the voltage hiccup.

Abstract: A power supply controller having a shortened reset time due to a small hiccup voltage includes an electrical circuit providing a repeated voltage hiccup of a supply voltage of the controller of a switched-mode power supply (SMPS) when the controller enters a latched state. A plurality of comparators each have an input coupled with the controller supply voltage. A multiplexer and two latches are included, each coupled with one or more comparator outputs, and a restart controller is coupled with an output of one of the latches. The restart controller in various implementations toggles a switch to activate and deactivate a current sink to create the supply voltage hiccup. In other implementations, the switch is excluded and the restart controller toggles a voltage startup transistor to couple and decouple a voltage source with the supply voltage to create the voltage hiccup.

Abstract: A power supply controller having a shortened reset time due to a small hiccup voltage includes an electrical circuit providing a repeated voltage hiccup of a supply voltage of the controller of a switched-mode power supply (SMPS) when the controller enters a latched state. A plurality of comparators each have an input coupled with the controller supply voltage. A multiplexer and two latches are included, each coupled with one or more comparator outputs, and a restart controller is coupled with an output of one of the latches. The restart controller in various implementations toggles a switch to activate and deactivate a current sink to create the supply voltage hiccup. In other implementations, the switch is excluded and the restart controller toggles a voltage startup transistor to couple and decouple a voltage source with the supply voltage to create the voltage hiccup.

Abstract: A power supply controller having a shortened reset time due to a small hiccup voltage includes an electrical circuit providing a repeated voltage hiccup of a supply voltage of the controller of a switched-mode power supply (SMPS) when the controller enters a latched state. A plurality of comparators each have an input coupled with the controller supply voltage. A multiplexer and two latches are included, each coupled with one or more comparator outputs, and a restart controller is coupled with an output of one of the latches. The restart controller in various implementations toggles a switch to activate and deactivate a current sink to create the supply voltage hiccup. In other implementations, the switch is excluded and the restart controller toggles a voltage startup transistor to couple and decouple a voltage source with the supply voltage to create the voltage hiccup.

Abstract: An over-power compensation circuit for use in a switched mode power supply having a current sense circuit for sensing a current flowing through a power transistor of the switched mode power supply. The over-power compensation circuit includes a peak detector, a sample-and-hold circuit, a current offset generator, and an offset resistor. The peak detector has an input for receiving an input voltage derived from the input line, and an output. The sample-and-hold circuit has an input connected to the output of the peak detector, and an output. The current offset generator has an input connected to the output of the sample-and-hold circuit, and an output for providing an offset current. The offset resistor has a first terminal connected to the output of the current offset generator, and a second terminal adapted to be connected to a current conducting electrode of the power transistor.

Abstract: An over-power compensation circuit for use in a switched mode power supply having a current sense circuit for sensing a current flowing through a power transistor of the switched mode power supply. The over-power compensation circuit includes a peak detector, a sample-and-hold circuit, a current offset generator, and an offset resistor. The peak detector has an input for receiving an input voltage derived from the input line, and an output. The sample-and-hold circuit has an input connected to the output of the peak detector, and an output. The current offset generator has an input connected to the output of the sample-and-hold circuit, and an output for providing an offset current. The offset resistor has a first terminal connected to the output of the current offset generator, and a second terminal adapted to be connected to a current conducting electrode of the power transistor.

Abstract: A variable-frequency oscillator (10) is formed to change an internal delay of the oscillator inversely proportional to changes in the frequency of the oscillator.

Abstract: A variable-frequency oscillator (10) is formed to change an internal delay of the oscillator inversely proportional to changes in the frequency of the oscillator.

Abstract: A method to control a switched reluctance motor (SRM) with a first phase (1) and a second phase (2) comprises: aligning the rotor with the second phase (2); at a first time point (t1), energizing the first phase (1) with a phase voltage that is substantially constant; monitoring an increase of the phase current (I1) in the first phase (1) until the phase current reaches a maximum (302); monitoring a decrease (303) of the first current (I1) until at a second time point (t2) the phase current (I1) reaches a minimum (304) and starts to increase again (305); de-energizing the first phase (1) at a third time point (t3) that follows the second time point at (t2) at a predetermined time interval; and repeating energizing, monitoring and de-energizing for the second phase (2) instead of the first phase (1).