Abstract: Apparatuses and methods for reducing standby current in memory array access circuits are disclosed. An example apparatus includes a activation voltage supply line and a sense amplifier coupled to the activation voltage supply line. The sense amplifier is configured to be activated by an activation voltage provided on the activation voltage supply line. A read-write circuit is coupled to a pair of local input/output lines and a pair of global input/output lines, and further coupled to the activation voltage supply line. The read-write circuit is configured to drive the pair global input/output lines based on voltages of the pair of local input/output lines when activated for a read operation and further configured to drive the pair of local input/output lines based on voltages of the pair of global input/output lines when activated for a write operation.

Abstract: A semiconductor device is equipped with memory cells which are provided at the intersections of word lines and local bit lines, hierarchical switches which are respectively connected between the local bit lines and a global bit line, and a hierarchical sense amplifier which amplifies a potential difference generated between signal nodes, with the signal nodes being respectively connected to the local bit lines. According to the present invention, because the hierarchical sense amplifier is a differential type circuit, a stable sensing operation can be performed. In addition, because one hierarchical sense amplifier can be assigned to multiple local bit lines, the number of hierarchical sense amplifiers can be reduced.

Abstract: A semiconductor device is equipped with memory cells which are provided at the intersections of word lines and local bit lines, hierarchical switches which are respectively connected between the local bit lines and a global bit line, and a hierarchical sense amplifier which amplifies a potential difference generated between signal nodes, with the signal nodes being respectively connected to the local bit lines. According to the present invention, because the hierarchical sense amplifier is a differential type circuit, a stable sensing operation can be performed. In addition, because one hierarchical sense amplifier can be assigned to multiple local bit lines, the number of hierarchical sense amplifiers can be reduced.

Abstract: A semiconductor device is disclosed, which comprises: a memory cell, first and second bit lines, a switch between the first and second bit lines, a sense amplifier, a sense amplifier driving circuit driving the sense amplifier with first and second voltages, a precharge circuit precharging the first bit line, and a control circuit. The control circuit performs a read operation so that the first and second bit lines are disconnected from each other and the first bit line is precharged to a precharge voltage, during a first period. Thereafter, the control circuit performs a restoring operation in a state where the first and second bit lines are connected to each other and the precharging of the first bit line is cancelled, during a second period after the first period.

Abstract: Disclosed herein is a device that includes: a first control element that controls an amount of current flowing between a second line and a first node according to a potential of a first line; a second control element that controls an amount of current flowing between the first line and the first node according to a potential of the second line; a first control circuit that performs a first operation to fix potentials of the first and second lines at a first potential; a second control circuit that performs a second operation to connect the first node to the second node; and a third control circuit that fixes a potential of the first node at a second potential after the first control circuit stops the first operation until the second control circuit starts the second operation.