Patents by Inventor Jacek Budny

Jacek Budny has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7172432
    Abstract: A stacked multiple connection module that provides multiple times the input/output (I/O) signal capacity of a single connection module. In one embodiment, a stacked dual connection module includes first and second circuit boards with respective edge connectors maintained at a parallel offset and configured to couple to a mating two slotted stacked edge connector. A connection means is provided to couple signals between the first and second circuit boards, such that components mounted on the first and/or second circuit board are enabled to access I/O signals via both of the edge connectors, thus doubling I/O signal capacity. In one embodiment, the stacked dual connection module comprises an Advanced Mezzanine Card (AdvancedMC) module having edge connectors configured to mate with an AdvancedMC connector.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: February 6, 2007
    Assignee: Intel Corporation
    Inventors: Edoardo Campini, Douglas Lee Stahl, Steven DeNies, Jay Gilbert, Jacek Budny, Gerard Wisniewski
  • Publication number: 20060223343
    Abstract: A stacked multiple connection module that provides multiple times the input/output (I/O) signal capacity of a single connection module. In one embodiment, a stacked dual connection module includes first and second circuit boards with respective edge connectors maintained at a parallel offset and configured to couple to a mating two slotted stacked edge connector. A connection means is provided to couple signals between the first and second circuit boards, such that components mounted on the first and/or second circuit board are enabled to access I/O signals via both of the edge connectors, thus doubling I/O signal capacity. In one embodiment, the stacked dual connection module comprises an Advanced Mezzanine Card (AdvancedMC) module having edge connectors configured to mate with an AdvancedMC connector.
    Type: Application
    Filed: March 31, 2005
    Publication date: October 5, 2006
    Inventors: Edoardo Campini, Douglas Stahl, Steven DeNies, Jay Gilbert, Jacek Budny, Gerard Wisniewski
  • Publication number: 20050186807
    Abstract: An apparatus includes a circuit board and a connector assembly which extends outwardly from the circuit board and is capable of simultaneously being connected to a plurality of mezzanine cards.
    Type: Application
    Filed: April 18, 2005
    Publication date: August 25, 2005
    Inventors: Jacek Budny, Gerard Wisniewski
  • Publication number: 20050114627
    Abstract: A method of co-processing includes connecting an interface of a first processor to an interface of a second is configurable to place the second processor in a slave processing mode or a master processing mode. The method also includes sending a task from the first processor to the second processor through the bus. The task includes an instruction that places the second processor in a slave processing mode.
    Type: Application
    Filed: November 26, 2003
    Publication date: May 26, 2005
    Inventors: Jacek Budny, Gerard Wisniewski
  • Publication number: 20050048805
    Abstract: An apparatus includes a circuit board and a connector assembly which extends outwardly from the circuit board and is capable of simultaneously being connected to a plurality of mezzanine cards.
    Type: Application
    Filed: September 2, 2004
    Publication date: March 3, 2005
    Inventors: Jacek Budny, Gerard Wisniewski
  • Patent number: 6805560
    Abstract: An apparatus includes a circuit board and a connector assembly which extends outwardly from the circuit board and is capable of simultaneously being connected to a plurality of mezzanine cards.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: October 19, 2004
    Assignee: Intel Corporation
    Inventors: Jacek Budny, Gerard Wisniewski
  • Patent number: 6791832
    Abstract: An electronic package for providing an increased density of electronic components in systems includes electronic components mounted on two surfaces of a substrate. Electrical coupling is provided by electrical contacts mounted with substantially the same arrangement and number on both surfaces of the substrate. Two conductive substrates having apertures are mounted adjacent and substantially parallel to the two component mounting surfaces such that the electrical contacts mounted on the two surfaces protrude through the apertures of the two conductive substrates. The two conductive substrates are coupled to one or more heat sinks to conduct heat away from the multiple electronic components contained between the conductive substrates. Multiple electronic packages can be coupled together to form a stacked electronic package by physically connecting the electrical contacts of the electronic packages.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: September 14, 2004
    Assignee: Intel Corporation
    Inventors: Jacek Budny, Gerard Wisniewski
  • Publication number: 20030184966
    Abstract: An electronic package for providing an increased density of electronic components in systems includes electronic components mounted on two surfaces of a substrate. Electrical coupling is provided by electrical contacts mounted with substantially the same arrangement and number on both surfaces of the substrate. Two conductive substrates having apertures are mounted adjacent and substantially parallel to the two component mounting surfaces such that the electrical contacts mounted on the two surfaces protrude through the apertures of the two conductive substrates. The two conductive substrates are coupled to one or more heat sinks to conduct heat away from the multiple electronic components contained between the conductive substrates. Multiple electronic packages can be coupled together to form a stacked electronic package by physically connecting the electrical contacts of the electronic packages.
    Type: Application
    Filed: March 26, 2002
    Publication date: October 2, 2003
    Applicant: Intel Corporation
    Inventors: Jacek Budny, Gerard Wisniewski