Abstract: A method for bonding CVD diamond to silicon. The first step of the method involves subsequently depositing a transition layer 48 on a diamond layer 46 of a composite wafer 40. Once the transition layer 48 has been deposited, wafer layer 50 comprised of silicon, is bonded to the transition layer 48. In this method, the transition layer 48 comprises carbon and silicon, with the portion of the transition layer 48 adjacent the diamond layer 46 being comprised of substantially carbon and the portion of the transition layer 48 adjacent the wafer layer 50 being comprised of substantially silicon. With the method, sharp interfaces and poor thermal matches between the layers in the composite wafer can be minimized. As a result, the layers in the composite wafer are less likely to delaminate and the composite wafer is likely to warp or bow due to mismatched film stresses.

Abstract: A bonded wafer with a bond junction having low resistivity due to the low level of oxides at the bond junction. A plasma that removes native oxide layers from wafers is exposed to the wafers. The plasma forms a hydrophobic polymer seal on the wafers, inhibiting subsequent native oxide growth upon exposure to air. The polymer seal on the wafers to be bonded are pressed together and the wafers are annealed to form the bonded wafer in a non-oxidizing ambient. The bond junction formed is primarily silicon to silicon and silicon to carbon bonds.

Abstract: Low temperature wafer bonding using a silicon-oxidizing bonding liquid permits introduction of radiation hardening dopants and electrically active dopants as constituents of the bonding liquid. Oxidizers such as nitric acid may be used in the bonding liquid. Dielectric layers on the device wafer and the handle wafer may be used when additional silicon is provided for the oxidative bonding. Integrated circuits fabricated from such bonded wafers may have buried layers and radiation hardening with device silicon too thick for implantation.

Abstract: A semiconductor-on-diamond structure has a free-standing layer of diamond material that is thick enough to provide integrity for the integrated circuit and to insulate the circuit. The structure has a layer of diamond material 12 on a layer of silicon nitride 62. A device layer of semiconductor material 30 is positioned over the silicon nitride layer.

Abstract: A bonded wafer with a bond junction having low resistivity due to the low level of oxides at the bond junction. A plasma that removes native oxide layers from wafers is exposed to the wafers. The plasma forms a hydrophobic polymer seal on the wafers, inhibiting subsequent native oxide growth upon exposure to air. The polymer seal on the wafers to be bonded are pressed together and the wafers are annealed to form the bonded wafer in a non-oxidizing ambient. The bond junction formed is primarily silicon to silicon and silicon to carbon bonds.

Abstract: Low temperature silicon-on-insulator wafer bonding using a silicide bond formation reaction. Dielectric isolation with silicon dioxide, diamond, silicon-nitride, and so forth yields buried resistors under trench isolated silicon islands. Buried dielectrics can be thermally susceptible films like diamond due to the low temperature of the bonding silicidation reaction. Bonding silicides also provide thermal dissipating layer between a buried diamond layer and a handle wafer for good overall thermal conductivity. Bonding silicides also act as diffusion barriers.

Abstract: Silicon on diamond die 5 are separated by patterning the diamond layer 3 and sawing the silicon layer 4. The diamond layer 3 is patterned by known techniques including laser ablation or using a silicon dioxide mask to resist deposition of diamond material. Patterning may take place after formation of microelectronic devices in dies in the silicon layer, after a device water is bonded to a diamond layer but before formation of the devices, prior to joining the device wafer to the diamond layer.

Abstract: In a method of etching a thin film resistor material, such as NiCr or CrSi, and of producing a thin film resistor, a non-photoresist hard mask is deposited on an exposed surface of thin film resistor material, a delineated portion of the hard mask is etched with a hydrogen peroxide etchant that does not affect the thin film resistor material to expose the material therebeneath, and the exposed thin film resistor material is etched with a second etchant that does not affect the hard mask. The second etchant may be sulfuric acid heated to greater than 125.degree. C. for NiCr or a mixture of phosphoric acid, nitric acid and hydrofluoric acid for CrSi. The hard mask preferably comprises TiW.

Abstract: A method for bonding CVD diamond to silicon. The first step of the method involves subsequently depositing a transition lawyer 48 on a diamond layer 46 of a composite wafer 40. Once the transition layer 48 has been deposited, wafer layer 50 comprised of silicon, is bonded or deposited to the transition layer 48. In this method, the transition layer 48 comprises carbon and silicon, with the portion of the transition layer 48 adjacent the diamond layer 46 being comprised of substantially carbon and the portion of the transition layer 48 adjacent the wafer layer 50 being comprised of substantially silicon. With the method, sharp interfaces and poor thermal matches between the layers in the composite wafer can be minimized. As a result, the layers in the composite wafer are less likely to delaminate and the composite wafer is likely to warp or bow due to mismatched film stresses.

Abstract: Low temperature wafer bonding using a silicon-oxidizing bonding liquid permits introduction of radiation hardening dopants and electrically active dopants as constituents of the bonding liquid. Oxidizers such as nitric acid may be used in the bonding liquid. Dielectric layers on the device wafer and the handle wafer may be used when additional silicon is provided for the oxidative bonding. Integrated circuits fabricated from such bonded wafers may have buried layers and radiation hardening with device silicon too thick for implantation.

Abstract: A gas phase plasma cleaning method and apparatus is shown for removing contaminants from the surface of exposed metallic parts on integrated circuits (IC's). A two step method is shown using a defined gas mixture of argon and oxygen, and ammonia and hydrogen. The gases are separately introduced into a plasma chamber. The argon oxygen mixture is used to remove carbonatious material by chemical reaction and by milling. The ammonia hydrogen mixture is introduced to chemically remove and reduce oxides and phosphates. Surface energies are increased to permit improved adhesion of inks. Additionally, intermediate oxides formed after the plasma exposure prevent complete regrowth of the normally passivating oxide layer.

Abstract: Methods of forming a carbon containing, minority carrier barrier layer on the surface of a semiconductor, which methods may be used to form barriers between the emitter of a single crystal transistor and a polysilicon layer in electrical contact therewith, and thus transistors with an emitter with enhanced efficiency.

Abstract: Low temperature silicon-on-insulator wafer bonding using a silicide bond formation reaction. Dielectric isolation with silicon dioxide, diamond, silicon nitride, and so forth yields buried resistors under trench isolated silicon islands. Buried dielectrics can be thermally susceptible films like diamond due to the low temperature of the bonding silicidation reaction. Bonding silicides also provide thermal dissipating layer between a buried diamond layer and a handle wafer for good overall thermal conductivity. Bonding silicides also act as diffusion barriers. The silicide bonding takes place in the presense of a liquid oxidizer such as aqueous solution of HNO.sub.3 and H.sub.2 O.sub.2.

Abstract: Low temperature wafer bonding using a silicon-oxidizing bonding liquid permits introduction of radiation hardening dopants and electrically active dopants as constituents of the bonding liquid. Oxidizers such as nitric acid may be used in the bonding liquid. Dielectric layers on the device wafer and the handle wafer may be used when additional silicon is provided for the oxidative bonding. Integrated circuits fabricated from such bonded wafers may have buried layers and radiation hardening with device silicon too thick for implantation.

Abstract: A process for removing unwanted contaminant metallic oxide from the surface of a nickel branding layer of an electronic circuit package, in order to enhance the affinity of a layer of phenolic branding ink to the surface of the metallic branding layer involves treating the surface of the metallic branding layer with a hydrogen-containing, chemical reducing gas phase ambient, so that oxygen within the surface oxide chemically combines with the hydrogen component within the ambient, so as to form readily removable water. The surface of the metallic branding layer is thereby substantially free of surface oxide, providing a greater surface area of metallic-ink bonding sites. As a consequently, a subsequently deposited layer of branding ink strongly adheres to the surface of the nickel and is not readily removed during further cleaning of the circuit package.

Abstract: A semiconductor-on-insulator structure incorporating a layer of diamond material and method for preparing such. The structure comprises a layer containing diamond material and having a first surface. A layer of silicon nitride is formed on the first surface and a layer of semiconductor material is positioned over the silicon nitride layer. In one embodiment of the method there is provided a removable deposition surface. A layer of crystalline diamond material is formed on the deposition surface. A first surface of the diamond material is separated from the deposition surface. The structure is useful for formation of integrated circuits thereon.

Abstract: The amount of extraneous gas within a hermetic sealed package, such as water vapor, is measured by measuring the total gas pressure within the package. This gas pressure is compared to a correlation made of expected total pressure within a package to deviations to that total pressure to determine the amount of extraneous gas. The correlation itself is derived statistically by comparing samples of actual total pressure to expected total pressure. These samples are then used to statistically produce the above correlation which is then used in actual testing.