Patents by Inventor Jae-Min Jung
Jae-Min Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160162091Abstract: A chip on film package includes a flexible base film having a first surface and a second surface opposite to each other that includes at least one through hole therein, a plurality of wirings disposed on the first surface and the second surface of the base film, respectively, that include a first lead and a second lead connected to each other through the at least one through hole, and a display panel driving chip and a touch panel sensor chip, each mounted on any one of the first surface and the second surface of the base film, wherein at least one of the display panel driving panel and the touch panel sensor chip is electrically connected to the first and second leads.Type: ApplicationFiled: February 10, 2016Publication date: June 9, 2016Inventors: JEONG-KYU HA, KWAN-JAi LEE, JAE-MIN JUNG, KYONG-SOON CHO, NA-RAE SHIN, KYOUNG-SUK YANG, PA-LAN LEE, SO-YOUNG LIM
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Patent number: 9362333Abstract: Semiconductor packages are provided. A semiconductor package may include a semiconductor chip. The semiconductor package may include a substrate and first and second conductive regions on the substrate. In some embodiments, the substrate may be a flexible substrate, and the first and second conductive regions may be on the same surface of the flexible substrate. Display devices including semiconductor packages are also provided. In some embodiments, a display device may include a flexible substrate that is bent such that first and second conductive regions thereof are connected to each other via an intervening third conductive region.Type: GrantFiled: July 9, 2014Date of Patent: June 7, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-Min Jung, Jeong-Kyu Ha
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Publication number: 20160143554Abstract: An apparatus for measuring bioelectrical signals is provided. The apparatus includes a sensor electrode, a sensor support, and a main body. The sensor electrode has a tapering portion that narrows toward one end and a protruding portion that extends from the one end of the tapering portion, contacts a body part, and senses bioelectrical signals. The sensor support maintains the contact between the sensor electrode and the body part. The main body is connected to the sensor support and is wearable on a living body.Type: ApplicationFiled: November 20, 2015Publication date: May 26, 2016Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Se-hoon LIM, Jun-hyung PARK, Hee-jae JO, Jang-beom YANG, Jae-min JUNG, Eun-mi OH, Jong-ho CHOI, Jun-ho KOH, Chang-Hyun LEE, Yong-hyun LIM, Hae-in CHUN
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Patent number: 9349683Abstract: A chip-on-film package comprises a film substrate comprising upper and lower surfaces, and a side having a bending part. A first output interconnection formed on the upper surface of the film substrate extends from a semiconductor chip disposed on the upper surface toward the bending part. A second output interconnection includes an upper output interconnection formed on the upper surface of the film substrate, and a lower output interconnection formed on the lower surface and extending onto the bending part. An input interconnection includes an upper input interconnection formed on the upper surface of the film substrate and a lower input interconnection formed on the lower surface and extending away from the bending part. Through-vias are formed to pass through the film substrate and electrically connect the upper output interconnection to the lower output interconnection, and the upper input interconnection to the lower input interconnection.Type: GrantFiled: May 15, 2015Date of Patent: May 24, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae-Min Jung, Jeong-Kyu Ha
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Publication number: 20160111299Abstract: A tape film package is provided including an insulating pattern; a via contact in a via hole in the insulating pattern; first interconnection patterns extending from the via contact to a cutting surface of the insulating pattern; and second interconnection patterns connected to the via contact below the insulating pattern. The second interconnection patterns are parallel to the first interconnection patterns and spaced apart from the cutting surface of the insulating pattern.Type: ApplicationFiled: December 14, 2015Publication date: April 21, 2016Inventors: Jeong-Kyu HA, Youngshin KWON, KwanJai LEE, Jae-Min JUNG, KyongSoon CHO, Sang-Uk HAN
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Patent number: 9313889Abstract: Provided is a display apparatus. The display apparatus includes a display panel, a flexible circuit film having a rear surface connected to the display panel, and a front surface opposite to the rear surface, the front surface having a chip mounted thereon, and a first lead bonding portion electrically connecting the chip to the display panel. The first lead bonding portion includes a first portion connected to the chip and overlying a portion of the flexible circuit film, a second portion passing through the flexible circuit film, and a third portion disposed between the flexible circuit film and the display panel on the rear surface of the flexible circuit film, where the third portion overlaps the first portion.Type: GrantFiled: April 25, 2014Date of Patent: April 12, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kyoungsuk Yang, Jeong-Kyu Ha, PaLan Lee, Narae Shin, Soyoung Lim, Jae-Min Jung, KyongSoon Cho
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Patent number: 9305990Abstract: Provided are a chip-on-film (COF) package and a device assembly including the same. The device assembly includes a COF package including a film substrate on which a plurality of film-through wires are formed. The device assembly includes a panel unit including a panel substrate on which a plurality of panel-through wires are formed. The panel unit is disposed on the COF package. One end of the panel unit is electrically connected to a first end of the COF package. The device assembly includes a control unit disposed below the panel unit. One end of the control unit is electrically connected to a second end of the COF package.Type: GrantFiled: March 10, 2014Date of Patent: April 5, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae-Min Jung, Kyong-Soon Cho, Jeong-Kyu Ha
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Patent number: 9280182Abstract: A chip on film package includes a flexible base film having a first surface and a second surface opposite to each other that includes at least one through hole therein, a plurality of wirings disposed on the first surface and the second surface of the base film, respectively, that include a first lead and a second lead connected to each other through the at least one through hole, and a display panel driving chip and a touch panel sensor chip, each mounted on any one of the first surface and the second surface of the base film, wherein at least one of the display panel driving panel and the touch panel sensor chip is electrically connected to the first and second leads.Type: GrantFiled: March 3, 2014Date of Patent: March 8, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jeong-Kyu Ha, Kwan-Jai Lee, Jae-Min Jung, Kyong-Soon Cho, Na-Rae Shin, Kyoung-Suk Yang, Pa-Lan Lee, So-Young Lim
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Publication number: 20160049356Abstract: A chip-on-film package comprises a film substrate comprising upper and lower surfaces, and a side having a bending part. A first output interconnection formed on the upper surface of the film substrate extends from a semiconductor chip disposed on the upper surface toward the bending part. A second output interconnection includes an upper output interconnection formed on the upper surface of the film substrate, and a lower output interconnection formed on the lower surface and extending onto the bending part. An input interconnection includes an upper input interconnection formed on the upper surface of the film substrate and a lower input interconnection formed on the lower surface and extending away from the bending part. Through-vias are formed to pass through the film substrate and electrically connect the upper output interconnection to the lower output interconnection, and the upper input interconnection to the lower input interconnection.Type: ApplicationFiled: May 15, 2015Publication date: February 18, 2016Inventors: Jae-Min JUNG, Jeong-Kyu HA
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Publication number: 20160020196Abstract: Chip-on-film packages and device assemblies including the same may be provided. The device assembly includes a film package including a semiconductor chip, a panel substrate connected to one end of the film package, a display panel disposed on the panel substrate, and a controlling part connected to another end of the film package. The film package includes a film substrate, a first wire disposed on a top surface of the film substrate, and a second wire disposed on a bottom surface of the film substrate.Type: ApplicationFiled: September 28, 2015Publication date: January 21, 2016Inventors: Jae-Min JUNG, Sang-Uk Han, KwanJai Lee, KyongSoon Cho, Jeong-Kyu Ha
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Patent number: 9241407Abstract: A tape film package is provided including an insulating pattern; a via contact in a via hole in the insulating pattern; first interconnection patterns extending from the via contact to a cutting surface of the insulating pattern; and second interconnection patterns connected to the via contact below the insulating pattern. The second interconnection patterns are parallel to the first interconnection patterns and spaced apart from the cutting surface of the insulating pattern.Type: GrantFiled: January 23, 2013Date of Patent: January 19, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Jeong-Kyu Ha, Youngshin Kwon, KwanJai Lee, Jae-Min Jung, KyongSoon Cho, Sang-Uk Han
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Patent number: 9177904Abstract: Chip-on-film packages and device assemblies including the same may be provided. The device assembly includes a film package including a semiconductor chip, a panel substrate connected to one end of the film package, a display panel disposed on the panel substrate, and a controlling part connected to another end of the film package. The film package includes a film substrate, a first wire disposed on a top surface of the film substrate, and a second wire disposed on a bottom surface of the film substrate.Type: GrantFiled: February 18, 2013Date of Patent: November 3, 2015Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae-Min Jung, Sang-Uk Han, KwanJai Lee, KyongSoon Cho, Jeong-Kyu Ha
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Publication number: 20150311148Abstract: A semiconductor package includes: a semiconductor chip including an effective chip region at a center of the semiconductor chip and in which pads connected to chip wirings are formed, and a dummy chip region at a side of the effective chip region and in which pads not connected to the chip wirings are formed; a base film including a chip mounting section on which the semiconductor chip is mounted; and a plurality of wiring patterns disposed on the base film and electrically connected to the chip wirings of the semiconductor chip, wherein first wiring patterns, which are a part of the plurality of wiring patterns, extend on a first region of the chip mounting section corresponding to the dummy chip region.Type: ApplicationFiled: March 3, 2015Publication date: October 29, 2015Inventors: Jae-min JUNG, Na-rae SHIN
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Patent number: 9113545Abstract: A tape wiring substrate includes a base film having at least one recess in a first surface of the base film and a chip-mounting region on which a semiconductor chip is included on a second surface of the base film. A wiring pattern is formed on the second surface of the base film and is extended to an edge of the chip-mounting region. A protection film covers the wiring pattern.Type: GrantFiled: September 5, 2012Date of Patent: August 18, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-uk Han, Young-shin Kwon, Kwan-jai Lee, Jae-min Jung, Kyong-soon Cho, Jeong-kyu Ha
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Patent number: 9059162Abstract: A COF substrate may include a base film, first upper conductive patterns, at least one second upper conductive pattern and lower conductive patterns. The first upper conductive patterns may be arranged on an upper surface of the base film. Each of the first upper conductive patterns may have an inner pattern and an outer pattern spaced apart from each other. The second upper conductive pattern may be arranged on the upper surface of the base film between the first upper conductive patterns. The lower conductive patterns may be arranged on a lower surface of the base film. The lower conductive patterns may be electrically connected between the inner pattern and the outer pattern. Thus, conductive materials causing a short between the panel patterns may not exist between the inner pattern and the outer pattern on the upper surface of the base film.Type: GrantFiled: July 2, 2013Date of Patent: June 16, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Jeong-Kyu Ha, Kwan-Jai Lee, Jae-Min Jung, Kyong-Soon Cho, Na-Rae Shin, Kyoung-Suk Yang, Pa-Lan Lee, So-Young Lim
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Publication number: 20150060931Abstract: Semiconductor packages are provided. A semiconductor package may include a semiconductor chip. The semiconductor package may include a substrate and first and second conductive regions on the substrate. In some embodiments, the substrate may be a flexible substrate, and the first and second conductive regions may be on the same surface of the flexible substrate. Display devices including semiconductor packages are also provided. In some embodiments, a display device may include a flexible substrate that is bent such that first and second conductive regions thereof are connected to each other via an intervening third conductive region.Type: ApplicationFiled: July 9, 2014Publication date: March 5, 2015Inventors: Jae-Min Jung, Jeong-Kyu Ha
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Publication number: 20140367659Abstract: A display device includes a substantially planar semiconductor package. The semiconductor package drives unit display elements of the display device. The semiconductor package is not folded and has a flat structure. Thus, the occurrence of defects and/or errors in the display device may be reduced as compared to display devices including folded non-planar semiconductor packages. As a result, reliability of the display device may be improved.Type: ApplicationFiled: May 15, 2014Publication date: December 18, 2014Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: KyongSoon CHO, Jae-Min JUNG, Jeong-Kyu HA
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Publication number: 20140328031Abstract: Provided is a display apparatus. The display apparatus includes a display panel, a flexible circuit film having a rear surface connected to the display panel, and a front surface opposite to the rear surface, the front surface having a chip mounted thereon, and a first lead bonding portion electrically connecting the chip to the display panel. The first lead bonding portion includes a first portion connected to the chip and overlying a portion of the flexible circuit film, a second portion passing through the flexible circuit film, and a third portion disposed between the flexible circuit film and the display panel on the rear surface of the flexible circuit film, where the third portion overlaps the first portion.Type: ApplicationFiled: April 25, 2014Publication date: November 6, 2014Applicant: Samsung Electronics Co., Ltd.Inventors: KYOUNGSUK YANG, Jeong-Kyu HA, PaLan LEE, NARAE SHIN, Soyoung LIM, Jae-Min JUNG, KyongSoon CHO
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Patent number: D771260Type: GrantFiled: June 25, 2015Date of Patent: November 8, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Hee Jae Jo, Se Hoon Lim, Jun Hyung Park, Jang Beom Yang, Jae Min Jung, Jun Ho Koh, Chang Hyun Lee, Yong Hyun Lim, Hae In Chun
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Patent number: D771822Type: GrantFiled: June 25, 2015Date of Patent: November 15, 2016Assignee: SAMSUNG EECTRONICS CO., LTD.Inventors: Hee Jae Jo, Se Hoon Lim, Jun Hyung Park, Jang Beom Yang, Jae Min Jung, Jun Ho Koh, Chang Hyun Lee, Yong Hyun Lim, Hae In Chun