Patents by Inventor Jae-Kul Lee
Jae-Kul Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10847476Abstract: A semiconductor package includes a connection structure, a semiconductor chip, and an encapsulant. The connection structure includes an insulating layer, a redistribution layer disposed on the insulating layer, and a connection via penetrating through the insulating layer and connected to the redistribution layer. The semiconductor chip has an active surface on which connection pads are disposed and an inactive surface opposing the active surface, and the active surface is disposed on the connection structure to face the connection structure. The encapsulant covers at least a portion of the semiconductor chip. The semiconductor chip includes a groove formed in the active surface and a dam structure disposed around the groove in the active surface.Type: GrantFiled: May 8, 2019Date of Patent: November 24, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun Woo Myung, Jae Kul Lee, Seon Ho Lee
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Patent number: 10748828Abstract: A fan-out sensor package includes: a redistribution portion having a through-hole and including a wiring layer and vias; a first semiconductor chip having an active surface having a sensing region of which at least a portion is exposed through the through-hole and first connection pads disposed in the vicinity of the sensing region; a second semiconductor chip disposed side by side with the first semiconductor chip in a horizontal direction and having second connection pads; dam members disposed in the vicinity of the first connection pads; an encapsulant encapsulating the redistribution portion, the first semiconductor chip, and the second semiconductor chip; and electrical connection structures electrically connecting the first connection pads and the second connection pads to the wiring layer or the vias of the redistribution portion.Type: GrantFiled: September 17, 2018Date of Patent: August 18, 2020Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Ha Yong Jung, Jae Kul Lee, Ji Hye Shim, Han Sang Cho, Woon Ha Choi, Jae Min Choi, Dong Jin Kim, Sung Taek Woo
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Patent number: 10741498Abstract: A semiconductor package includes: a first structure including a plurality of stacked first semiconductor chips and electrically connected to a first redistribution layer through connection vias having different heights; and a second structure including a second semiconductor chip electrically connected to a second redistribution layer. The first and second redistribution layers are electrically connected to each other through an electrical connection member formed on the second structure.Type: GrantFiled: March 19, 2019Date of Patent: August 11, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yu Seon Heo, Jae Kul Lee
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Patent number: 10692791Abstract: An electronic component package includes a core member including an insulating layer, and having a first through-hole passing through the insulating layer, a semiconductor chip disposed in the first through-hole, and having an active surface on which a connection pad is disposed, and an inactive surface opposing the active surface, an encapsulant encapsulating the core member and the semiconductor chip, and filling at least a portion of the first through-hole, a connection member disposed on the core member and the semiconductor chip, and including a redistribution layer electrically connected to the connection pad, a backside metal layer disposed on the encapsulant, and covering at least the inactive surface of the semiconductor chip, and a backside metal via passing through the encapsulant, and connecting the backside metal layer to one side of the insulating layer. The backside metal via is in contact with the one side of the insulating layer.Type: GrantFiled: November 1, 2018Date of Patent: June 23, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Akihisa Kuroyanagi, Jun Woo Myung, Jae Kul Lee
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Publication number: 20200168565Abstract: A semiconductor package includes a connection structure, a semiconductor chip, and an encapsulant. The connection structure includes an insulating layer, a redistribution layer disposed on the insulating layer, and a connection via penetrating through the insulating layer and connected to the redistribution layer. The semiconductor chip has an active surface on which connection pads are disposed and an inactive surface opposing the active surface, and the active surface is disposed on the connection structure to face the connection structure. The encapsulant covers at least a portion of the semiconductor chip. The semiconductor chip includes a groove formed in the active surface and a dam structure disposed around the groove in the active surface.Type: ApplicationFiled: May 8, 2019Publication date: May 28, 2020Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun Woo Myung, Jae Kul Lee, Seon Ho Lee
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Patent number: 10629641Abstract: A fan-out sensor package includes: a first connection member having a through-hole and including a first wiring layer; a sensor chip disposed in the through-hole; an optical lens disposed in the through-hole and attached to the sensor chip; an encapsulant encapsulating at least portions of the first connection member, the sensor chip, and the optical lens; and a second connection member including a first insulating layer disposed on the first connection member, the sensor chip, and the optical lens, a redistribution layer disposed on the first insulating layer, and a second insulating layer disposed on the first insulating layer and covering the redistribution layer. The redistribution layer electrically connects the first wiring layer and the connection pads, the first insulating layer has a cavity exposing at least a portion of one surface of the optical lens, and one side of the cavity is closed by the second insulating layer.Type: GrantFiled: July 17, 2018Date of Patent: April 21, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Jae Kul Lee
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Patent number: 10615212Abstract: A fan-out sensor package includes: a sensor chip having a first connection pads and an optical layer; an encapsulant encapsulating at least portions of the sensor chip; a connection member disposed on the sensor chip and the encapsulant and including a redistribution layer electrically connected to the first connection pads; through-wirings penetrating through the encapsulant and electrically connected to the redistribution layer; and electrical connection structures disposed on the other surface of the encapsulant opposing one surface of the encapsulant on which the connection member is disposed and electrically connected to the through-wirings, wherein the sensor chip and the connection member are physically spaced apart from each other by a predetermined distance, and the first connection pads and the redistribution layer are electrically connected to each other through first connectors disposed between the sensor chip and the connection member.Type: GrantFiled: May 17, 2018Date of Patent: April 7, 2020Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Ha Yong Jung, Jae Kul Lee, Sung Taek Woo, Ji Hye Shim, Dong Jin Kim, Han Sang Cho, Woon Ha Choi, Jae Min Choi
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Publication number: 20200020638Abstract: A semiconductor package includes: a first structure including a plurality of stacked first semiconductor chips and electrically connected to a first redistribution layer through connection vias having different heights; and a second structure including a second semiconductor chip electrically connected to a second redistribution layer. The first and second redistribution layers are electrically connected to each other through an electrical connection member formed on the second structure.Type: ApplicationFiled: March 19, 2019Publication date: January 16, 2020Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yu Seon Heo, Jae Kul Lee
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Publication number: 20190371692Abstract: An electronic component package includes a core member including an insulating layer, and having a first through-hole passing through the insulating layer, a semiconductor chip disposed in the first through-hole, and having an active surface on which a connection pad is disposed, and an inactive surface opposing the active surface, an encapsulant encapsulating the core member and the semiconductor chip, and filling at least a portion of the first through-hole, a connection member disposed on the core member and the semiconductor chip, and including a redistribution layer electrically connected to the connection pad, a backside metal layer disposed on the encapsulant, and covering at least the inactive surface of the semiconductor chip, and a backside metal via passing through the encapsulant, and connecting the backside metal layer to one side of the insulating layer. The backside metal via is in contact with the one side of the insulating layer.Type: ApplicationFiled: November 1, 2018Publication date: December 5, 2019Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Akihisa KUROYANAGI, Jun Woo MYUNG, Jae Kul LEE
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Patent number: 10438927Abstract: A fan-out semiconductor package includes: a core member having a first through-hole and including first and second wiring layer disposed on different levels; a first semiconductor chip disposed in the first through-hole; a second semiconductor chip disposed on the first semiconductor chip in the first through-hole so that a second inactive surface faces a first inactive surface; conductive wires disposed on the core member and a second active surface and electrically connecting second connection pads and the second wiring layer to each other; an encapsulant covering at least portions of the core member, the first semiconductor chip, the second semiconductor chip, and the conductive wires and filling at least portions of the first through-hole; and a connection member disposed on the core member and a first active surface and electrically connecting first connection pads and the first wiring layer to each other.Type: GrantFiled: May 22, 2018Date of Patent: October 8, 2019Assignee: SAMSUNG ELECTRONICS CO, LTD.Inventors: Ha Yong Jung, Jae Min Choi, Jae Kul Lee, Dong Jin Kim, Sung Taek Woo, Ji Hye Shim, Woon Ha Choi, Han Sang Cho
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Publication number: 20190237375Abstract: A fan-out sensor package includes: a redistribution portion having a through-hole and including a wiring layer and vias; a first semiconductor chip having an active surface having a sensing region of which at least a portion is exposed through the through-hole and first connection pads disposed in the vicinity of the sensing region; a second semiconductor chip disposed side by side with the first semiconductor chip in a horizontal direction and having second connection pads; dam members disposed in the vicinity of the first connection pads; an encapsulant encapsulating the redistribution portion, the first semiconductor chip, and the second semiconductor chip; and electrical connection structures electrically connecting the first connection pads and the second connection pads to the wiring layer or the vias of the redistribution portion.Type: ApplicationFiled: September 17, 2018Publication date: August 1, 2019Inventors: Ha Yong JUNG, Jae Kul LEE, Ji Hye SHIM, Han Sang CHO, Woon Ha CHOI, Jae Min CHOI, Dong Jin KIM, Sung Taek WOO
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Publication number: 20190189667Abstract: A fan-out sensor package includes: a sensor chip having a first connection pads and an optical layer; an encapsulant encapsulating at least portions of the sensor chip; a connection member disposed on the sensor chip and the encapsulant and including a redistribution layer electrically connected to the first connection pads; through-wirings penetrating through the encapsulant and electrically connected to the redistribution layer; and electrical connection structures disposed on the other surface of the encapsulant opposing one surface of the encapsulant on which the connection member is disposed and electrically connected to the through-wirings, wherein the sensor chip and the connection member are physically spaced apart from each other by a predetermined distance, and the first connection pads and the redistribution layer are electrically connected to each other through first connectors disposed between the sensor chip and the connection member.Type: ApplicationFiled: May 17, 2018Publication date: June 20, 2019Inventors: Ha Yong JUNG, Jae Kul LEE, Sung Taek WOO, Ji Hye SHIM, Dong Jin KIM, Han Sang CHO, Woon Ha CHOI, Jae Min CHOI
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Publication number: 20190189589Abstract: A fan-out semiconductor package includes: a core member having a first through-hole and including first and second wiring layer disposed on different levels; a first semiconductor chip disposed in the first through-hole; a second semiconductor chip disposed on the first semiconductor chip in the first through-hole so that a second inactive surface faces a first inactive surface; conductive wires disposed on the core member and a second active surface and electrically connecting second connection pads and the second wiring layer to each other; an encapsulant covering at least portions of the core member, the first semiconductor chip, the second semiconductor chip, and the conductive wires and filling at least portions of the first through-hole; and a connection member disposed on the core member and a first active surface and electrically connecting first connection pads and the first wiring layer to each other.Type: ApplicationFiled: May 22, 2018Publication date: June 20, 2019Inventors: Ha Yong JUNG, Jae Min CHOI, Jae Kul LEE, Dong Jin KIM, Sung Taek WOO, Ji Hye SHIM, Woon Ha CHOI, Han Sang CHO
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Publication number: 20190123082Abstract: A fan-out sensor package includes: a first connection member having a through-hole and including a first wiring layer; a sensor chip disposed in the through-hole; an optical lens disposed in the through-hole and attached to the sensor chip; an encapsulant encapsulating at least portions of the first connection member, the sensor chip, and the optical lens; and a second connection member including a first insulating layer disposed on the first connection member, the sensor chip, and the optical lens, a redistribution layer disposed on the first insulating layer, and a second insulating layer disposed on the first insulating layer and covering the redistribution layer. The redistribution layer electrically connects the first wiring layer and the connection pads, the first insulating layer has a cavity exposing at least a portion of one surface of the optical lens, and one side of the cavity is closed by the second insulating layer.Type: ApplicationFiled: July 17, 2018Publication date: April 25, 2019Inventor: Jae Kul LEE
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Patent number: 9907182Abstract: A method of manufacturing an insulation film includes: coating a resin composite on a lower protective film, the resin composite including an inorganic filler dispersed therein; forming an insulating layer by drying the resin composite such that the inorganic filler is precipitated in the coated resin composite; and laminating an upper protective film on the insulating layer.Type: GrantFiled: March 9, 2016Date of Patent: February 27, 2018Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Ho-Hyung Ham, Hwa-Young Lee, Jae-Kul Lee, Ok-Seon Yoon
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Publication number: 20170086303Abstract: A method of manufacturing an insulation film includes: coating a resin composite on a lower protective film, the resin composite including an inorganic filler dispersed therein; forming an insulating layer by drying the resin composite such that the inorganic filler is precipitated in the coated resin composite; and laminating an upper protective film on the insulating layer.Type: ApplicationFiled: March 9, 2016Publication date: March 23, 2017Applicant: Samsung Electro-Mechanic Co., Ltd.Inventors: Ho-Hyung HAM, Hwa-Young LEE, Jae-Kul LEE, Ok-Seon YOON
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Publication number: 20160055964Abstract: A common mode filter and a manufacturing method thereof are disclosed.Type: ApplicationFiled: March 19, 2015Publication date: February 25, 2016Inventors: Seung-Wook PARK, Won-Chul SIM, Jang-Su KIM, Jae-Kul LEE
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Patent number: 9035196Abstract: Disclosed herein is a circuit board including: a core layer including a via hole; a metal film covering an inner wall of the via hole; a circuit pattern connected to the metal film on the core layer; and a plug surrounded by the metal film in the via hole and having a thickness thinner than a thickness of the core layer.Type: GrantFiled: March 14, 2013Date of Patent: May 19, 2015Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seung Wook Park, Jae Kul Lee, Jin Gu Kim, Chang Bae Lee
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Patent number: 8929091Abstract: A method of manufacturing a printed circuit board (PCB) having an embedded bare chip includes attaching a tape to one side of an insulated substrate having a penetration hole formed therein, and attaching the bare chip onto the tape inside the penetration hole such that electrode pads of the bare chip face the tape; filling up the penetration hole with a filler, and removing the tape; laminating a metal layer onto a surface of the filler and the insulated substrate from which the tape is removed; and forming electrode bumps by removing portions of the metal layer. The forming of electrode bumps further includes simultaneously removing portions of the metal layer and forming an circuit pattern on one side of the insulated substrate. The circuit pattern is formed directly on the upper side of the insulated substrate and the electrode bumps are formed on the surface of the electrode pads.Type: GrantFiled: May 11, 2011Date of Patent: January 6, 2015Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Kyung-Jin Han, Hyung-Tae Kim, Moon-Il Kim, Jae-Kul Lee, Doo-Hwan Lee
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Publication number: 20140174809Abstract: Disclosed herein is a circuit board including: a core layer including a via hole; a metal film covering an inner wall of the via hole; a circuit pattern connected to the metal film on the core layer; and a plug surrounded by the metal film in the via hole and having a thickness thinner than a thickness of the core layer.Type: ApplicationFiled: March 14, 2013Publication date: June 26, 2014Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Seung Wook PARK, Jae Kul Lee, Jin Gu Kim, Chang Bae Lee