Patents by Inventor Jaideep Mavoori
Jaideep Mavoori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9460380Abstract: Technologies are generally directed to assembly of a Radio Frequency Identification (RFID) tag precursor. An assembly may be provided, the assembly having an RFID integrated circuit (IC), a nonconductive repassivation layer on a surface of the IC and confined within a perimeter of the surface, and a conductive redistribution layer on the repassivation layer and confined within the perimeter of the surface, in which a first portion of the redistribution layer is electrically connected to the IC through a first electrical connection. A substrate having a first antenna terminal to the assembly may be attached with an adhesive, and at least a first portion of a nonconductive barrier present on at least one of the first antenna terminal and the first portion of the redistribution layer may be reacted with a reactant to make the first portion of the nonconductive barrier conductive.Type: GrantFiled: August 4, 2014Date of Patent: October 4, 2016Assignee: IMPINJ, INTERNATIONAL LTD.Inventors: Ronald Lee Koepp, Tan Mau Wu, Ronald A. Oliver, Harley Heinrich, Jaideep Mavoori, Christopher J. Diorio
-
Patent number: 9436902Abstract: An RFID IC assembly having a repassivation layer and a conductive redistribution layer may be assembled onto a tag substrate with an additional layer. The additional layer includes one or more etchants for creating an opening in a nonconductive barrier layer between the assembly and the substrate, and may also include an adhesive for attaching the assembly to the substrate.Type: GrantFiled: August 4, 2014Date of Patent: September 6, 2016Assignee: IMPINJ, INTERNATIONAL LTD.Inventors: Ronald Lee Koepp, Tan Mau Wu, Ronald A. Oliver, Harley Heinrich, Jaideep Mavoori, Christopher J. Diorio
-
Patent number: 8881373Abstract: An assembly having an RFID integrated circuit (IC), a nonconductive repassivation layer on a surface of the IC and confined within a perimeter of the surface, and a conductive redistribution layer on the repassivation layer and confined within the perimeter of the surface may be provided. At least a first portion of the redistribution layer may be electrically connected to the IC through a first opening in the repassivation layer. Furthermore, a substrate having a first antenna terminal may be provided, and a second opening may be formed in a nonconductive barrier present on at least one of the first antenna terminal and the first portion of the redistribution layer with an etchant. The first opening and the second opening may be nonoverlapping. The assembly may be attached to the substrate with an adhesive.Type: GrantFiled: February 25, 2013Date of Patent: November 11, 2014Assignee: Impinj, Inc.Inventors: Ronald Lee Koepp, Ronald A. Oliver, Harley Heinrich, Jaideep Mavoori, Tan Mau Wu, Christopher J. Diorio
-
Patent number: 8759937Abstract: A Schottky junction diode device having improved performance and a multiple well structure is fabricated in a conventional CMOS process. A substrate including a material doped to a first conductivity type is formed. A first well is disposed over the substrate. The first well includes a material doped differently, such as to a second conductivity type opposite that of the first conductivity type. A second well is disposed within the first well. A region of metal-containing material is disposed in the second well to form a Schottky junction at an interface between the region of metal-containing material and the second well. In one embodiment, a second well contact is disposed in a portion of the second well.Type: GrantFiled: March 22, 2006Date of Patent: June 24, 2014Assignee: Synopsys, Inc.Inventors: Yanjun Ma, Ronald A. Oliver, Todd E. Humes, Jaideep Mavoori
-
Publication number: 20140142458Abstract: Techniques for amplifying a plurality of input voltages to generate a corresponding plurality of output voltages. In an exemplary embodiment, each of the plurality of input voltages is referenced to a common voltage comprising the average of the plurality of input voltages, wherein for each of the input voltages, the common voltage is coupled to a common node via a corresponding switch.Type: ApplicationFiled: January 24, 2014Publication date: May 22, 2014Inventors: Kent W. Leyde, Jaideep Mavoori
-
Patent number: 8349676Abstract: Apparatus, systems, and methods may include managing electrostatic discharge events by using a semiconductor device having a non-aligned gate to implement a snap-back voltage protection mechanism. Such devices may be formed by doping a semiconductor substrate to form a first conductive region as a well, forming one of a source region and a drain region in the well, depositing a layer of polysilicon on the substrate to establish a gating area that does not overlap the one of the source region and the drain region, and forming an integrated circuit supported by the substrate to couple to the one of the source region and the drain region to provide snap-back voltage operation at a node between the integrated circuit and the source or drain region. Additional apparatus, systems, and methods are disclosed.Type: GrantFiled: August 19, 2011Date of Patent: January 8, 2013Assignee: Synopsys, Inc.Inventors: Cong Khieu, Yanjun Ma, Jaideep Mavoori
-
Publication number: 20110298051Abstract: Apparatus, systems, and methods may include managing electrostatic discharge events by using a semiconductor device having a non-aligned gate to implement a snap-back voltage protection mechanism. Such devices may be formed by doping a semiconductor substrate to form a first conductive region as a well, forming one of a source region and a drain region in the well, depositing a layer of polysilicon on the substrate to establish a gating area that does not overlap the one of the source region and the drain region, and forming an integrated circuit supported by the substrate to couple to the one of the source region and the drain region to provide snap-back voltage operation at a node between the integrated circuit and the source or drain region. Additional apparatus, systems, and methods are disclosed.Type: ApplicationFiled: August 19, 2011Publication date: December 8, 2011Applicant: SYNOPSYS, INC.Inventors: Cong Khieu, Yanjun Ma, Jaideep Mavoori
-
Patent number: 8022498Abstract: Apparatus, systems, and methods may include managing electrostatic discharge events by using a semiconductor device having a non-aligned gate to implement a snap-back voltage protection mechanism. Such devices may be formed by doping a semiconductor substrate to form a first conductive region as a well, forming one of a source region and a drain region in the well, depositing a layer of polysilicon on the substrate to establish a gating area that does not overlap the one of the source region and the drain region, and forming an integrated circuit supported by the substrate to couple to the one of the source region and the drain region to provide snap-back voltage operation at a node between the integrated circuit and the source or drain region. Additional apparatus, systems, and methods are disclosed.Type: GrantFiled: August 13, 2007Date of Patent: September 20, 2011Assignee: Synopsys, Inc.Inventors: Cong Khieu, Yanjun Ma, Jaideep Mavoori
-
Publication number: 20110169530Abstract: A circuit for classification of analog input signals, comprising an analog memory component, such as a floating gate, used to store a threshold value; a threshold detection module used to determine whether the analog input signal exceeds the threshold value; a time delay module used to delay a processing of the analog signal; a time-amplitude window calculation module used to determine whether an amplitude of the analog input signal is between a lower limit and an upper limit of an amplitude window; and an output module indicating whether the amplitude of the analog signal is between the lower and the upper limit, wherein the indication is used to determine whether the analog input signal belongs to one of a plurality of analog signal classes. The classification is implemented in the analog domain, eliminating the need for sampling and digitizing the analog signal, consequently minimizing circuit area and power.Type: ApplicationFiled: October 7, 2008Publication date: July 14, 2011Applicant: WASHINGTON, UNIVERSITY OFInventors: Jaideep Mavoori, Chris Diorio
-
Publication number: 20110166430Abstract: The present invention provides systems and methods for ambulatory, long term monitoring of a physiological signal from a patient. At least a portion of the systems of the present invention may be implanted within the patient in a minimally invasive manner. In preferred embodiments, brain activity signals are sampled from the patient and are transmitted to a handheld patient communication device for further processing.Type: ApplicationFiled: March 17, 2011Publication date: July 7, 2011Inventors: John F. Harris, Kent W. Leyde, Jaideep Mavoori
-
Patent number: 7843032Abstract: Apparatus, systems, and methods may include managing electrostatic discharge events in radio frequency identification (RFID) devices by using a semiconductor circuit having a non-aligned gate to implement a snap-back voltage protection mechanism. Such circuits may be formed by doping a semiconductor substrate to form a first conductive region as a well, forming one of a source region and a drain region in the well, depositing a layer of polysilicon on the substrate to establish a gating area that does not overlap the one of the source region and the drain region, and forming an integrated circuit including an RFID circuit that is supported by the substrate to couple to the one of the source region and the drain region to provide snap-back voltage operation at a node between the integrated circuit and the source or drain region. Additional apparatus, systems, and methods are disclosed.Type: GrantFiled: December 27, 2007Date of Patent: November 30, 2010Assignee: Synopsis, Inc.Inventors: Cong Khieu, Yanjun Ma, Jaideep Mavoori
-
Patent number: 7732887Abstract: A Schottky junction diode device having improved performance is fabricated in a conventional CMOS process. A substrate including a material doped to a first conductivity type is formed. A first well is disposed over the substrate. The first well includes a material doped to a second conductivity type opposite that of the first conductivity type. A region of metal-containing material is disposed over the first well to form a Schottky junction at an interface between the region of metal-containing material and the first well. In one embodiment, a first well contact is disposed in a portion of the first well. A second well is disposed over the substrate wherein the second well includes a material doped to the first conductivity type. In one embodiment, the first well and the second well are not in direct contact with one another.Type: GrantFiled: March 22, 2006Date of Patent: June 8, 2010Assignee: Virage Logic CorporationInventors: Yanjun Ma, Ronald A. Oliver, Todd E. Humes, Jaideep Mavoori
-
Publication number: 20100125219Abstract: The present invention provides systems and methods for ambulatory, long term monitoring of a physiological signal from a patient. At least a portion of the systems of the present invention may be implanted within the patient in a minimally invasive manner. In preferred embodiments, brain activity signals are sampled from the patient and are transmitted to a handheld patient communication device for further processing.Type: ApplicationFiled: January 21, 2010Publication date: May 20, 2010Inventors: John F. Harris, Kent W. Leyde, Jaideep Mavoori
-
Patent number: 7676263Abstract: The present invention provides systems and methods for ambulatory, long term monitoring of a physiological signal from a patient. At least a portion of the systems of the present invention may be implanted within the patient in a minimally invasive manner. In preferred embodiments, brain activity signals are sampled from the patient and are transmitted to a handheld patient communication device for further processing.Type: GrantFiled: June 21, 2007Date of Patent: March 9, 2010Assignee: NeuroVista CorporationInventors: John F. Harris, Kent W. Leyde, Jaideep Mavoori
-
Patent number: 7525349Abstract: A circuit for classification of analog input signals, comprising an analog memory component, such as a floating gate, used to store a threshold value; a threshold detection module used to determine whether the analog input signal exceeds the threshold value; a time delay module used to delay a processing of the analog signal; a time-amplitude window calculation module used to determine whether an amplitude of the analog input signal is between a lower limit and an upper limit of an amplitude window; and an output module indicating whether the amplitude of the analog signal is between the lower and the upper limit, wherein the indication is used to determine whether the analog input signal belongs to one of a plurality of analog signal classes. The classification is implemented in the analog domain, eliminating the need for sampling and digitizing the analog signal, consequently minimizing circuit area and power.Type: GrantFiled: August 14, 2006Date of Patent: April 28, 2009Assignee: University of WashingtonInventors: Jaideep Mavoori, Chris Diorio
-
Publication number: 20090105786Abstract: The invention provides a method and device for inducing a conditioned neural response in a subject. The method comprises detecting spike activity in a first neural site in the subject; and delivering a stimulus pulse to a second neural site in the subject. The stimulus pulse is delivered within the time window for synaptic strengthening following the detecting of a spike. These two steps, detection and stimulation, are repeated continuously, typically for a day or two. The conditioned neural response is induced when a pattern of neural activity evoked by stimulation at the first neural site emulates a pattern of neural activity evoked by stimulation at the second neural site. The conditioned neural response persists for an extended period of time.Type: ApplicationFiled: October 21, 2008Publication date: April 23, 2009Applicant: University of WashingtonInventors: Eberhard Fetz, Andrew Jackson, Jaideep Mavoori
-
Publication number: 20080125989Abstract: A circuit for classification of analog input signals, comprising an analog memory component, such as a floating gate, used to store a threshold value; a threshold detection module used to determine whether the analog input signal exceeds the threshold value; a time delay module used to delay a processing of the analog signal; a time-amplitude window calculation module used to determine whether an amplitude of the analog input signal is between a lower limit and an upper limit of an amplitude window; and an output module indicating whether the amplitude of the analog signal is between the lower and the upper limit, wherein the indication is used to determine whether the analog input signal belongs to one of a plurality of analog signal classes. The classification is implemented in the analog domain, eliminating the need for sampling and digitizing the analog signal, consequently minimizing circuit area and power.Type: ApplicationFiled: August 14, 2006Publication date: May 29, 2008Applicant: University of WashingtonInventors: Jaideep Mavoori, Chris Diorio
-
Publication number: 20080033502Abstract: The present invention provides systems and methods for ambulatory, long term monitoring of a physiological signal from a patient. At least a portion of the systems of the present invention may be implanted within the patient in a minimally invasive manner. In preferred embodiments, brain activity signals are sampled from the patient and are transmitted to a handheld patient communication device for further processing.Type: ApplicationFiled: June 21, 2007Publication date: February 7, 2008Inventors: John Harris, Kent Leyde, Jaideep Mavoori
-
Minimally Invasive Monitoring Systems for Monitoring a Patient's Propensity for a Neurological Event
Publication number: 20080027348Abstract: The present invention provides systems and methods for ambulatory, long term monitoring of a physiological signal from a patient. At least a portion of the systems of the present invention may be implanted within the patient in a minimally invasive manner. In preferred embodiments, brain activity signals are sampled from the patient with an externally powered leadless implanted device and are transmitted to a handheld patient communication device for processing to estimate the patient's propensity for a seizure.Type: ApplicationFiled: June 21, 2007Publication date: January 31, 2008Inventors: John Harris, Kent Leyde, Jaideep Mavoori -
Publication number: 20080027347Abstract: The present invention provides methods for minimally invasive, long term monitoring of a physiological signal (e.g., neural signals) from a patient. In preferred embodiments, neural signals are sampled from the patient with an externally powered, leadless implanted device and are transmitted to an external device for further processing.Type: ApplicationFiled: June 21, 2007Publication date: January 31, 2008Inventors: John Harris, Kent Leyde, Jaideep Mavoori