Abstract: A switch matrix structure for planar circuitry such as printed circuit boards and integrated circuits includes a plurality of signal dividers and a plurality of switches. Each signal divider is configured to receive a corresponding input signal and generate a corresponding plurality of divider output signals. Each switch is configured to receive a corresponding divider output from a corresponding signal divider. Each switch is configured to provide a corresponding output signal such that a plurality of output signals are generated by the plurality of switches. In an example, the plurality of switches are arranged in a column, with a first subset of the plurality of signal dividers on a first side of the column, and a second subset of the plurality of signal dividers on a second side of the column. In an example, such a routing configuration reduces a number of routing layers and/or a number of via transitions.