Patents by Inventor James D. Meindl
James D. Meindl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8563365Abstract: An exemplary embodiment of the present invention provides a chip for use in fabricating a three-dimensional integrated circuit, the chip comprising a wafer, one or more metallic-filled, electrical vias, and one or more hollow, fluidic vias. The wafer can comprise a first surface and a second surface. The one or more metallic-filled, electrical vias can extend through the wafer. Each electrical via can be in electrical communication with an electrical interconnect proximate the first surface, providing electrical communication between chips in the integrated circuit. The one or more hollow, fluidic vias can extend through the wafer. Each fluidic via can be in fluid communication with a fluidic interconnect, providing fluid communication between adjacent chips in the integrated circuit. Each fluidic interconnect can comprise a first end proximate the first surface, a second end, and a cap proximate the second end, defining an air-filled space within the fluidic interconnect.Type: GrantFiled: March 9, 2012Date of Patent: October 22, 2013Assignee: Georgia Tech Research CorporationInventors: Calvin Richard King, Jr., Jesal Zevari, James D. Meindl, Muhannad S. Bakir
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Publication number: 20120228779Abstract: An exemplary embodiment of the present invention provides a chip for use in fabricating a three-dimensional integrated circuit, the chip comprising a wafer, one or more metallic-filled, electrical vias, and one or more hollow, fluidic vias. The wafer can comprise a first surface and a second surface. The one or more metallic-filled, electrical vias can extend through the wafer. Each electrical via can be in electrical communication with an electrical interconnect proximate the first surface, providing electrical communication between chips in the integrated circuit. The one or more hollow, fluidic vias can extend through the wafer. Each fluidic via can be in fluid communication with a fluidic interconnect, providing fluid communication between adjacent chips in the integrated circuit. Each fluidic interconnect can comprise a first end proximate the first surface, a second end, and a cap proximate the second end, defining an air-filled space within the fluidic interconnect.Type: ApplicationFiled: March 9, 2012Publication date: September 13, 2012Applicant: Georgia Tech Research CorporationInventors: Calvin Richard King, JR., Jesal Zevari, James D. Meindl, Muhannad S. Bakir
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Patent number: 7994590Abstract: High-dielectric-constant (k) materials and electrical devices implementing the high-k materials are provided herein. According to some embodiments, an electrical device includes a substrate and a crystalline-oxide-containing composition. The crystalline-oxide-containing composition can be disposed on a surface of the substrate. Within the crystalline-oxide-containing composition, oxide anions can form at least one of a substantially linear orientation or a substantially planar orientation. A plurality of these substantially linear orientations of oxide anions or substantially planar orientations of oxide anions can be oriented substantially perpendicular or substantially normal to the surface of the substrate such that the oxide-containing composition has a dielectric constant greater than about 3.9 in a direction substantially normal to the surface of the substrate. Other embodiments are also claimed and described.Type: GrantFiled: January 30, 2007Date of Patent: August 9, 2011Assignee: Georgia Tech Research CorporationInventors: Thomas K. Gaylord, James D. Meindl
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Patent number: 7935459Abstract: Photo-masks for fabricating surface-relief grating diffractive devices and methods of fabricating surface-relief grating diffractive devices are described. The photo-mask can include refractive elements and/or diffractive elements contained in or on a body element. The photo-mask can be used to simultaneously produce multiple surface-relief grating diffractive devices in a recording material. The photo-mask enables the surface-relief grating diffractive devices to be produced in large quantities while significantly reducing the cost and labor required.Type: GrantFiled: June 22, 2007Date of Patent: May 3, 2011Assignee: Georgia Tech Research CorporationInventors: Thomas K. Gaylord, Justin L. Stay, Jonathan S. Maikisch, James D. Meindl
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Patent number: 7928563Abstract: Three dimensional integrated circuits with microfluidic interconnects and methods of constructing same are provided. According to some embodiments, and microfluidic integrated circuit system can comprise a plurality of semiconductor die wafers each having a top and bottom exterior surface. The semiconductor die wafers can form a stack of die wafers. The die wafers can comprise one or more channels formed through the die wafers. The channels can extend generally between top and bottom exterior surfaces of the semiconductor die wafers. A plurality of micro-pipes can be disposed between adjacent semiconductor die wafers in the stack. The micro-pipes can enable the channels to be in fluid communication with each other. A barrier layer can be disposed within at least one of the channels and the micro-pipes. The barrier layer can be adapted to prevent a coolant flowing through the at least one of the channels and the micro-pipes from leeching into the channels and micro-pipes.Type: GrantFiled: May 28, 2008Date of Patent: April 19, 2011Assignee: Georgia Tech Research CorporationInventors: Muhannad S. Bakir, Deepak Sekar, Bing Dang, Calvin King, Jr., James D. Meindl
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Patent number: 7906255Abstract: Improved photo-masks for use in fabricating periodic structures are disclosed herein. Methods of making periodic structures, as well as the periodic structures fabricated therefrom, are also disclosed. The photo-mask can include a body element and one or more sets of diffractive elements and/or refractive elements disposed on the body element or within the body element. Each set of diffractive elements and/or refractive elements can be configured to produce four non-coplanar beams of light when a beam of light is passed through it. Each set of four non-coplanar beams of light can be used to interferometrically produce a specific periodic structure at a specific location within a photosensitive recording material.Type: GrantFiled: January 7, 2008Date of Patent: March 15, 2011Assignee: Georgia Tech Research CorporationInventors: Thomas K. Gaylord, Justin L. Stay, James D. Meindl
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Publication number: 20090294954Abstract: Three dimensional integrated circuits with microfluidic interconnects and methods of constructing same are provided. According to some embodiments, and microfluidic integrated circuit system can comprise a plurality of semiconductor die wafers each having a top and bottom exterior surface. The semiconductor die wafers can form a stack of die wafers. The die wafers can comprise one or more channels formed through the die wafers. The channels can extend generally between top and bottom exterior surfaces of the semiconductor die wafers. A plurality of micro-pipes can be disposed between adjacent semiconductor die wafers in the stack. The micro-pipes can enable the channels to be in fluid communication with each other. A barrier layer can be disposed within at least one of the channels and the micro-pipes. The barrier layer can be adapted to prevent a coolant flowing through the at least one of the channels and the micro-pipes from leeching into the channels and micro-pipes.Type: ApplicationFiled: May 28, 2008Publication date: December 3, 2009Applicant: Georgia Tech Research CorporationInventors: Muhannad S. Bakir, Deepak Sekar, Bing Dang, Calvin King, JR., James D. Meindl
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Patent number: 7554347Abstract: Optoelectronic probe cards, methods of fabrication, and methods of use, are disclosed. Briefly described, one exemplary embodiment includes an optoelectronic probe card adapted to test an electrical quality and an optical quality of an optoelectronic structure under test having electrical and optical components.Type: GrantFiled: March 17, 2003Date of Patent: June 30, 2009Assignee: Georgia Tech Research CorporationInventors: Tony Mule′, Hiren Thacker, Muhannad Bakir, James D. Meindl, Thomas K. Gaylord, Kevin P. Martin, Paul Kohl
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Publication number: 20090098468Abstract: Improved photo-masks for use in fabricating photonic crystal devices are disclosed herein. Methods of making photonic crystal devices, as well as the photonic crystal devices fabricated therefrom, are also disclosed. The photo-mask can include a body element and one or more sets of diffractive elements and/or refractive elements disposed on the body element or within the body element. Each set of diffractive elements and/or refractive elements can be configured to produce four non-coplanar beams of light when a beam of light is passed through it. Each set of four non-coplanar beams of light can be used to interferometrically produce a specific photonic crystal structure at a specific location within a photosensitive recording material.Type: ApplicationFiled: October 12, 2007Publication date: April 16, 2009Applicant: Georgia Tech Research CorporationInventors: THOMAS K. GAYLORD, Justin L. Stay, James D. Meindl
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Patent number: 7468558Abstract: Devices having one or more of the following: an input/output (I/O) interconnect system, an optical I/O interconnect, an electrical I/O interconnect, a radio frequency I/O interconnect, are disclosed. A representative I/O interconnect system includes a first substrate and a second substrate. The first substrate includes a compliant pillar vertically extending from the first substrate. The compliant pillar is constructed of a first material. The second substrate includes a compliant socket adapted to receive the compliant pillar. The compliant socket is constructed of a second material.Type: GrantFiled: May 3, 2006Date of Patent: December 23, 2008Assignee: Georgia Tech Research CorporationInventors: Muhannad S. Bakir, Kevin P. Martin, James D. Meindl
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Publication number: 20080212921Abstract: Improved optical interconnect devices, structures, and methods of making and using the devices and structures are provided herein. The optical interconnect devices, which can be used to connect components or route signals in an integrated-circuit or circuits, generally include an optical element having a metamaterial with a negative index of refraction. The optical element is configured to receive an optical signal from a first component and transmit the optical signal to a second component. Each interconnect device or structure can be fabricated to have a small size and complex functionalities integrated therein. Other embodiments are also claimed and described.Type: ApplicationFiled: March 3, 2008Publication date: September 4, 2008Applicant: Georgia Tech Research CorporationInventors: Thomas K. Gaylord, Justin L. Stay, James D. Meindl
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Publication number: 20080174754Abstract: Improved photo-masks for use in fabricating periodic structures are disclosed herein. Methods of making periodic structures, as well as the periodic structures fabricated therefrom, are also disclosed. The photo-mask can include a body element and one or more sets of diffractive elements and/or refractive elements disposed on the body element or within the body element. Each set of diffractive elements and/or refractive elements can be configured to produce four non-coplanar beams of light when a beam of light is passed through it. Each set of four non-coplanar beams of light can be used to interferometrically produce a specific periodic structure at a specific location within a photosensitive recording material.Type: ApplicationFiled: January 7, 2008Publication date: July 24, 2008Applicant: Georgia Tech Research CorporationInventors: Thomas K. Gaylord, Justin L. Stay, James D. Meindl
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Patent number: 7348786Abstract: Probe modules, methods of use of probe modules, and methods of preparing probe modules, are disclosed. A representative embodiment of a probe module, among others, includes a redistribution substrate and a probe substrate interfaced with the redistribution substrate. The probe substrate is operative to test at least one signal of at least one optoelectronic device under test. The probe substrate is operative to interface with electrical and optical components.Type: GrantFiled: August 31, 2005Date of Patent: March 25, 2008Assignee: Georgia Tech Research CorporationInventors: Hiren D. Thacker, Oluwafemi O. Ogunsola, James D. Meindl
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Patent number: 7266267Abstract: Input/output (I/O) interconnects, fluidic I/O interconnects, electrical, optical, and fluidic I/O interconnects, devices incorporating the I/O interconnects, systems incorporating the I/O interconnects, and methods of fabricating the I/O interconnects, devices, and systems, are described herein.Type: GrantFiled: October 28, 2005Date of Patent: September 4, 2007Assignee: Georgia Tech Research Corp.Inventors: Muhannad S. Bakir, James D. Meindl
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Publication number: 20070176248Abstract: High-dielectric-constant (k) materials and electrical devices implementing the high-k materials are provided herein. According to some embodiments, an electrical device includes a substrate and a crystalline-oxide-containing composition. The crystalline-oxide-containing composition can be disposed on a surface of the substrate. Within the crystalline-oxide-containing composition, oxide anions can form at least one of a substantially linear orientation or a substantially planar orientation. A plurality of these substantially linear orientations of oxide anions or substantially planar orientations of oxide anions can be oriented substantially perpendicular or substantially normal to the surface of the substrate such that the oxide-containing composition has a dielectric constant greater than about 3.9 in a direction substantially normal to the surface of the substrate. Other embodiments are also claimed and described.Type: ApplicationFiled: January 30, 2007Publication date: August 2, 2007Applicant: Georgia Tech Research CorporationInventors: THOMAS K. GAYLORD, James D. Meindl
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Patent number: 7135777Abstract: Devices having one or more of the following: an input/output (I/O) interconnect system, an optical I/O interconnect, an electrical I/O interconnect, a radio frequency I/O interconnect, are disclosed. A representative I/O interconnect system includes a first substrate and a second substrate. The first substrate includes a compliant pillar vertically extending from the first substrate. The compliant pillar is constructed a first material. The second substrate includes a compliant socket adapted to receive the compliant pillar. The compliant socket is constructed of a second material.Type: GrantFiled: May 5, 2003Date of Patent: November 14, 2006Assignee: Georgia Tech Research CorporationInventors: Muhannad S. Bakir, James D. Meindl
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Patent number: 7132736Abstract: Devices and methods of fabrication thereof are disclosed. A representative device includes a complaint wafer-level package having one or more lead packages. A representative lead package includes a substrate having a plurality of die pads disposed thereon and a plurality of leads attached to the plurality of die pads. In addition, the lead package includes a plurality of pillars made of a low modulus material. Each pillar is disposed between the substrate and at least one lead, and each lead is disposed upon one of the pillars that compliantly support the lead.Type: GrantFiled: October 31, 2002Date of Patent: November 7, 2006Assignee: Georgia Tech Research CorporationInventors: Muhannad S. Bakir, James D. Meindl, Chirag S. Patel
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Patent number: 7099525Abstract: Devices and systems having one or more of the following components: a compliant pillar with a modified tip surface (non-flat tip) and a corresponding compliant socket; an optical/electrical I/O interconnect and a corresponding compliant socket; a lens/waveguide optical pillar, a polymer bridge, and an L-shaped pillar, are described herein. In addition, methods of making these components and methods of using these components are disclosed herein.Type: GrantFiled: August 25, 2003Date of Patent: August 29, 2006Assignee: Georgia Tech Research CorporationInventors: Muhannad S. Bakir, Kevin P. Martin, James D. Meindl
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Patent number: 7016569Abstract: Systems and methods for back-of-die, through-wafer guided-wave optical clock distribution systems (networks) are disclosed. A representative back-of-die, through-wafer guided-wave optical clock distribution system includes an integrated circuit device with a first cladding layer disposed on the back-side of the integrated circuit device, and an core layer disposed on the first cladding layer. The core layer, the first cladding layer, or the second cladding layer can include, but is not limited to, vertical-to-horizontal input diffraction gratings, a horizontal-to-horizontal diffraction gratings, and horizontal-to-vertical output diffraction gratings.Type: GrantFiled: July 30, 2003Date of Patent: March 21, 2006Assignee: Georgia Tech Research CorporationInventors: Tony Mule, James D. Meindl, Thomas K. Gaylord
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Patent number: 6954576Abstract: Wafer-level electronic packages having waveguides and methods of fabricating chip-level electronic packages having waveguides are disclosed. A representative chip-level electronic package includes at least one waveguide having a waveguide core. In addition, another representative chip-level electronic package includes a waveguide having an air-gap cladding layer around a portion of the waveguide core. A representative method for fabricating a chip-level electronic package includes: providing a substrate having a passivation layer disposed on the substrate; disposing a waveguide core on a portion of the passivation layer; disposing a first sacrificial layer onto at least one portion of the passivation layer and the waveguide core; disposing an overcoat layer onto the passivation layer and the first sacrificial layer; and removing the first sacrificial layer to define an air-gap cladding layer within the overcoat polymer layer and around a portion of the waveguide core.Type: GrantFiled: July 21, 2004Date of Patent: October 11, 2005Assignee: Georgia Tech Research CorporationInventors: Tony Mule′, Chirag Patel, James D. Meindl, Thomas K. Gaylord, Elias N. Glytsis, Kevin P. Martin, Stephen M. Schultz, Muhannad Bakir, Hollie Reed, Paul Kohl