Abstract: Tamper-resistant circuitry for use with an electronic device is provided, where the electronic device comprises a plurality of connections for coupling the tamper-resistant circuitry to functional circuitry for performing functionality in connection with the electronic device. The tamper-resistant circuitry comprises an interface for coupling to the plurality of connections and a power source for coupling to at least one connection in the plurality of connections. The tamper-resistant circuitry further comprises circuitry operable to evaluate a measure of an operational parameter related to the power source and in response to a signal at at least one connection in the plurality of connections, to provide an acceptable range for the operational parameter, and to inhibit standard operation of the functional circuitry in response to detecting an anomaly in the functional circuitry by detecting that the measure is outside the acceptable range.

Abstract: A portable electronic device. Tamper-resistant circuitry for inclusion in an electronic device. The tamper-resistant circuitry comprises wireless receiving circuitry operable to receive an incoming communication. The tamper-resistant circuitry also comprises a first circuit operable to change a signal state in response to the incoming communication. The tamper-resistant circuitry also comprises a verification sensor circuit coupled to the first circuit. The sensor is operable to detect a circuit condition indicative of unauthorized use and upon detection of the circuit condition to prevent the change of the signal state.

Abstract: Tamper-resistant circuitry for use with an electronic device is provided, where the electronic device comprises a plurality of connections for coupling the tamper-resistant circuitry to functional circuitry for performing functionality in connection with the electronic device. The tamper-resistant circuitry comprises an interface for coupling to the plurality of connections and a power source for coupling to at least one connection in the plurality of connections. The tamper-resistant circuitry further comprises circuitry operable to evaluate a measure of an operational parameter related to the power source and in response to a signal at at least one connection in the plurality of connections, to provide an acceptable range for the operational parameter, and to inhibit standard operation of the functional circuitry in response to detecting an anomaly in the functional circuitry by detecting that the measure is outside the acceptable range.

Abstract: A portable electronic device. Tamper-resistant circuitry for inclusion in an electronic device. The tamper-resistant circuitry comprises wireless receiving circuitry operable to receive an incoming communication. The tamper-resistant circuitry also comprises a first circuit operable to change a signal state in response to the incoming communication. The tamper-resistant circuitry also comprises a verification sensor circuit coupled to the first circuit. The sensor is operable to detect a circuit condition indicative of unauthorized use and upon detection of the circuit condition to prevent the change of the signal state.

Abstract: A data processing device includes an electronic processor responsive to a context signal and operable in alternative processing contexts identified by the context signal. First and second registers are connected to the electronic processor to participate in one processing context while retaining information from another processing context until a return thereto. A context switching circuit is connected to the first and second registers and operates to selectively control input and output operations of the registers to and from the electronic processor depending on the processing context. Other devices, systems and methods are also disclosed.

Abstract: A data processing device includes an electronic processor responsive to a context signal and operable in alternative processing contexts identified by the context signal. First and second registers are connected to the electronic processor to participate in one processing context while retaining information from another processing context until a return thereto. A context switching circuit is connected to the first and second registers and operates to selectively control input and output operations of the registers to and from the electronic processor depending on the processing context. Other devices, systems and methods are also disclosed.

Abstract: A processor architecture comprises a priority processing unit (20), a priority memory (30), an instruction set memory (40), and an instruction execution unit (50). The priority processing unit (20) generates priority values and stores them in priority memory (30). Each priority value is associated with an instruction stored in instruction memory (40). Priority processing unit (20) causes the instruction associated with a particular priority value to be outputted to instruction execution unit (50).

Abstract: A data processing device includes an electronic processor responsive to a context signal and operable in alternative processing contexts identified by the context signal. First and second registers are connected to the electronic processor to participate in one processing context while retaining information from another processing context until a return thereto. A context switching circuit is connected to the first and second registers and operates to selectively control input and output operations of the registers to and from the electronic processor depending on the processing context. Other devices, systems and methods are also disclosed.

Abstract: A speech recognition system includes an electronic processor responsive to a context signal and operable in alternative processing contexts identified by the context signal. First and second registers are connected to the electronic processor to participate in one processing context while retaining information from another processing context until a return thereto. A context switching circuit is connected to the first and second registers and operates to selectively control input and output operations of the registers to and from the electronic processor depending on the processing context. Other devices, systems and methods are also disclosed.

Abstract: A modem includes an electronic processor responsive to a context signal and operable in alternative processing contexts identified by the context signal. First and second registers are connected to the electronic processor to participate in one processing context while retaining information from another processing context until a return thereto. A context switching circuit is connected to the first and second registers and operates to selectively control input and output operations of the registers to and from the electronic processor depending on the processing context. Other devices, systems and methods are also disclosed.

Abstract: An electromechanical apparatus includes an electronic processor responsive to a context signal and operable in alternative processing contexts identified by the context signal. First and second registers are connected to the electronic processor to participate in one processing context while retaining information from another processing context until a return thereto. A context switching circuit is connected to the first and second registers and operates to selectively control input and output operations of the registers to and from the electronic processor depending on the processing context. Other devices, systems and methods are also disclosed.

Abstract: A signal processing apparatus includes an electronic processor responsive to a context signal and operable in alternative processing contexts identified by the context signal. First and second registers are connected to the electronic processor to participate in one processing context while retaining information from another processing context until a return thereto. A context switching circuit is connected to the first and second registers and operates to selectively control input and output operations of the registers to and from the electronic processor depending on the processing context. Other devices, systems and methods are also disclosed.

Abstract: A memory cell constructed in accordance with the present invention includes a node operable to present an electrical level representing a first state or a second state. Further included is a first switching device having a first terminal connected to the node such that if the first switching device were to close, the electrical level at the node would be connected to a second terminal of the first switching device. Additionally, second and third switching devices are provided both having first and second terminals and both operable to switch as a function of the state at the node. Finally, a single control switching device is provided in association with the second and third switching devices wherein a control signal switches the control switching device such that the state at the node may be determined by connecting to the first terminals of the second and third switching devices.

Abstract: A data processing device includes an electronic processor responsive to a context signal and operable in alternative processing contexts identified by the context signal. First and second registers are connected to the electronic processor to participate in one processing context while retaining information from another processing context until a return thereto. A context switching circuit is connected to the first and second registers and operates to selectively control input and output operations of the registers to and from the electronic processor depending on the processing context. Other devices, systems and methods are also disclosed.

Abstract: Electronic speech control apparatus that includes a circuit for establishing and changing over time a subject code and an utterance index. The subject code generally indicates one of a plurality of sets of utterances. The utterance index identifies an utterance of at least one word in the set indicated by the subject code. Combined with the circuit is another circuit responsive thereto for generating the utterance identified by the utterance index in the set indicated by the subject code. The apparatus also repeatedly computes an emotion and generates an utterance representing the emotion so computed. The various utterances are made in an alternating conversational fashion in response to a person's speech. These and other aspects of apparatus and method are described in greater detail herein.

Abstract: An electrical meter has light-emissive display elements and a meter circuit featuring electrically floating input terminals relative to device ground, and offers a potentially significant cost advantage compared to available alternatives in low-accuracy measuring applications.A series string of the light-emissive display elements are physically arranged along a line in order of increasing turn-on current threshold of each element so that they are successively turned on along the line with increasing current to be measured. A control circuit included in the series string has first and second semiconductively-complementary active semiconductor devices, such as an NPN and PNP transistor, each with base, emitter, and collector. The input-sensing conductor, such as a base, of each active semiconductor is a respective floating input of the meter.