Patents by Inventor James Klingshirn

James Klingshirn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8708495
    Abstract: A method and apparatus for correcting vision in macular degeneration patients. Following a diagnostic procedure which has been successfully tested to determine the factors needed to correct the vision of a patient with macular degeneration, the present invention describes a prototype correcting procedure and device using a computer program and display device. Through manipulation of a grid and quantitative analysis of the manipulations, the extent and correction factors needed to correct the vision of a macular degeneration patient are discussed.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: April 29, 2014
    Assignee: The Regents fo the University of California
    Inventors: Walter Kohn, James A. Klingshirn
  • Publication number: 20110285960
    Abstract: A method and apparatus for correcting vision in macular degeneration patients. Following a diagnostic procedure which has been successfully tested to determine the factors needed to correct the vision of a patient with macular degeneration, the present invention describes a prototype correcting procedure and device using a computer program and display device. Through manipulation of a grid and quantitative analysis of the manipulations, the extent and correction factors needed to correct the vision of a macular degeneration patient are discussed.
    Type: Application
    Filed: May 20, 2011
    Publication date: November 24, 2011
    Applicant: The Regents of the University of California
    Inventors: Walter Kohn, James A. Klingshirn
  • Patent number: 6734873
    Abstract: An efficient method and system for displaying integrated transparent objects and animation with a window, such as an Internet Web page is described. The present invention implements a plugin-control, such as a Netscape plugin or ActiveX control, in the host program, such as a Web browser, wherein the plugin-control provides at least one graphics buffer in addition to the buffers used by the host program. The plugin-control can function according to the host program Application Programming Interface (API) for the plugin-control under which the at least one additional buffer is used to composite a “compositing plane” containing the transparent objects and animation with the host program window and where the resulting composited scene is returned to the host program buffers as part of the regular host program draw pipe. Additionally, the host program API may be circumvented and the resulting composited scene may be written directly to the front buffer for display on the display device.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: May 11, 2004
    Assignee: Viewpoint Corporation
    Inventors: Michael Herf, James Klingshirn, Sreekant Kotay
  • Patent number: 5067078
    Abstract: A first processing system is coupled to a plurality of integrated circuits along a P bus. Each of these integrated circuits has a combination cache and memory management unit (MMU). The cache/MMU integrated circuits are also connected to a main memory via an M bus. A second processing system is also coupled to the main memory primarily via a secondary bus but also via the M bus. External TAGs coupled between the M bus and the secondary bus are used to maintain coherency between the first and second processing systems. Each external TAG corresponds to a particular cache/MMU integrated circuit and maintains information as to the status of its corresponding cache/MMU integrated circuit. The cache/MMU integrated circuit provides the necessary status information to its corresponding external TAG in a very efficient manner. Each cache/MMU integrated circuit can also be converted to a SRAM mode in which the cache performs like a conventional high speed static random access memory (SRAM).
    Type: Grant
    Filed: April 17, 1989
    Date of Patent: November 19, 1991
    Assignee: Motorola, Inc.
    Inventors: Yoav Talgam, James A. Klingshirn, James B. Gullette
  • Patent number: 4996641
    Abstract: A cache has an address bus for receiving requests for data from a processor and a data bus for providing the requested data to the processor. As part of the mechanism for determining if there is a hit in the cache, the cache has TAG locations for storing TAG addresses. The hit signal is not generated unless a TAG address corresponds to the address received on the address bus. Associated with each TAG location are valid bits, disable bits, and LRU bits. The requested data is contained in data locations in the cache. Each data location has a corresponding TAG location. The disable bits can be set under the control of the processor for the case where a data location is defective. Additionally, in various diagnostic modes, the TAG locations, the valid bits, the LRU bits, and the data locations are directly accessible via the data bus.
    Type: Grant
    Filed: April 15, 1988
    Date of Patent: February 26, 1991
    Assignee: Motorola, Inc.
    Inventors: Yoav Talgam, Paul A. Reed, Elie Haddad, James A. Klingshirn
  • Patent number: 4914581
    Abstract: In a data processor, the conditions associated with an operand are evaluated only in response to the execution of a special instruction. The results of this evaluation is provided as a result operand and stored in a general purpose destination register. The evaluated conditions are each provided in discrete form, that is, unencoded, rather than in encoded form.
    Type: Grant
    Filed: October 26, 1987
    Date of Patent: April 3, 1990
    Assignee: Motorola, Inc.
    Inventors: Yoav Talgam, Mitch K. Alsup, James A. Klingshirn