Patents by Inventor James Mason Brafford

James Mason Brafford has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7355386
    Abstract: A method of automatically carrying IC-chips, on a planar array of vacuum nozzles, to a variable target in a chip tester uses a set of laser distance sensors to align the vacuum nozzles with the target. Alignment occurs when certain combinations of distance and distance changes are sensed.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: April 8, 2008
    Assignee: Delta Design, Inc.
    Inventors: Randy Neaman Siade, James Mason Brafford, James Downie
  • Patent number: 6924636
    Abstract: An electromechanical system for testing IC-chips includes a total of N chip holding subassemblies, where N is an integer greater than one and where each chip holding subassembly has sockets for holding a group of IC-modules that include the IC-chips; a moving mechanism for automatically moving the i-th chip holding subassembly from a load position in the system to a test position in the system, and visa-versa, where i ranges from 1 to N and changes with time in a sequence; and a temperature control mechanism which contacts the IC-modules at the test position. Between the moving of the i-th chip holding subassembly and the next chip holding subassembly in the sequence, the IC-chips are burn-in tested on all N of the chip holding subassemblies. Also, while the i-th chip holding subassembly is being moved, burn-in testing of IC-chips on the remaining N-1 chip holding subassemblies continues.
    Type: Grant
    Filed: November 10, 2003
    Date of Patent: August 2, 2005
    Assignee: Unisys Corporation
    Inventors: Randy Neaman Siade, Terry Sinclair Connacher, James Vernon Rhodes, James Mason Brafford, John Charles Montgomery, David Jon Mortensen
  • Patent number: 6919718
    Abstract: An electromechanical system for testing IC-chips includes a chip holding subassembly which has sockets for holding a group of IC-modules that include the IC-chips; a moving mechanism for automatically moving the chip holding subassembly from a load position in the system to a test position in the system, and visa-versa; a temperature control mechanism which contacts the IC-modules on the chip holding subassembly only when that subassembly is at the test position; and a chip handler mechanism for automatically moving the IC-modules into and out of the sockets, when the chip holding subassembly is at the load position. At the test position, the temperature control mechanism contacts the IC-modules to control their temperature. At the load position, the chip handler mechanism automatically unloads one group of IC-modules from the sockets on the chip holding subassembly and automatically loads another group of the IC-modules into the sockets.
    Type: Grant
    Filed: November 10, 2003
    Date of Patent: July 19, 2005
    Assignee: Unisys Corporation
    Inventors: Randy Neaman Siade, Terry Sinclair Connacher, James Vernon Rhodes, James Mason Brafford, John Charles Montgomery, David Jon Mortensen
  • Patent number: 6909299
    Abstract: An electromechanical system for testing IC-chips includes a total of N chip holding subassemblies; a moving mechanism for automatically moving the i-th chip holding subassembly from a load position in the system to the test position in the systems, and visa-versa, where i ranges from 1 to N and changes with time in a sequence; and a signal generator which sends test signals to the IC-chips at the test position. Between the moving of the i-th chip holding subassembly and the next subassembly in the sequence, test signals are sent to the IC-chips on all N of the chip holding subassemblies such that the signals are shifted in time from one subassembly to another. Also, while the i-th chip holding subassembly is being moved, the time shifted test signals continue to be sent to the IC-chips on the remaining N?1 chip holding subassemblies.
    Type: Grant
    Filed: November 10, 2003
    Date of Patent: June 21, 2005
    Assignee: Unisys Corporation
    Inventors: Randy Neaman Siade, Terry Sinclair Connacher, James Vernon Rhodes, James Mason Brafford, John Charles Montgomery, David Jon Mortensen
  • Patent number: 6581486
    Abstract: An integrated circuit tester includes a fail-safe mechanism for moving an integrated circuit chip between an initial position where the integrated circuit chip is inserted into the tester, and a test position where the integrated circuit chips is actually tested. This fail-safe mechanism includes a motor and a shaft which the motor rotates to move the integrated circuit chip. An electronic control circuit can be included to automatically stop the motor when the integrated circuit reaches its initial position, or its test position; but if the control circuit fails to operate properly, then damage to the integrated circuit tester is prevented by the fail-safe mechanism.
    Type: Grant
    Filed: October 11, 2001
    Date of Patent: June 24, 2003
    Assignee: Unisys Corporation
    Inventors: David John Ditri, Ronald Allen Norell, James Mason Brafford
  • Patent number: 6307391
    Abstract: An electromechanical apparatus for testing chips includes a pivoting springy mechanism which squeezes a chip holding subassembly between a temperature regulating subassembly and a power converter subassembly. This mechanism is comprised of a first arm that has a first pivotal joint, and a second arm that is coupled by a second pivotal joint to the first arm. An actuator is coupled to the first arm, and the actuator pivots the first arm from an open position to a closed position. In the open position, the angle between the arms is large; and the subassemblies are spaced apart. In the closed position, the angle between the arms is small but variable within a predetermined range; and the subassemblies are pressed together. This range of angles occurs due to various manufacturing tolerances and due to variable length stops that adjust the force with which the temperature regulating subassembly is pressed against the chip holding subassembly.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: October 23, 2001
    Assignee: Unisys Corporation
    Inventors: Jerry Ihor Tustaniwskyj, James Mason Brafford
  • Patent number: 6307388
    Abstract: An electromechanical apparatus for testing integrated chips includes a chip holding subassembly, a power converter subassembly, and a temperature regulating subassembly, which are squeezed together in multiple sets, by respective pressing mechanisms. One benefit which is achieved with this electromechanical apparatus is that by pressing the temperature regulating subassembly against the chip holding subassembly, heat can be added/removed from the chips by conduction; and thus the temperature of the chips can be regulated accurately. Another benefit which is achieved with this electromechanical apparatus is that by pressing the power converter subassembly against the chip holding subassembly, the distance between the chips that are tested and the power supplies for those chips is made small. Consequently, the chip voltages can easily be kept constant while the chip power dissipation changes rapidly as the chips are tested.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: October 23, 2001
    Assignee: Unisys Corporation
    Inventors: Lawrence William Friedrich, Jerry Ihor Tustaniwskyj, James Mason Brafford, James Wittman Babcock