Abstract: One aspect of this disclosure relates to a method of building a superconductor device on a substrate, comprising depositing an imprint layer on at least a portion of the subdtrate. The imprint layer is imprinted to provide an imprinted portion of the imprint layer and a non-imprinted portion of the imprint layer. A superonductor layer is deposited on at least a portion of the imprint portion of the imprint layer.

Abstract: One aspect of this disclosure relates to a method of building a superconductor device on a substrate, comprising depositing an imprint layer on at least a portion of the substrate. The imprint layer is imprinted to provide an imprinted portion of the imprint layer and a non-imprinted portion of the imprint layer. A superconductor layer is deposited on at least a portion of the imprinted portion of the imprint layer.

Abstract: A memory device including a substrate, and multiple self-alignednano-rectifying elements disposed over the substrate. Each nano-rectifying element has multiple first electrode lines, and multiple device structures disposed on the multiple first electrode lines forming the multiple self-aligned nano-rectifying elements. Each device structure has at least one lateral dimension less than about 75 nanometers. The memory device also includes multiple switching elements disposed over the device structures and self-aligned in at least one direction with the device structures. In addition, the memory device includes multiple second electrode lines disposed over, electrically coupled to, and self-aligned to the switching elements, whereby a memory device is formed.

Abstract: Photonic crystal structures are made by a method including steps of providing a substrate, depositing at least one planar layer to form a stack, each planar layer of the stack comprising two or more sublayers having different sublayer refractive indices, depositing a hard mask material, depositing an imprintable material over the hard mask material, patterning the imprintable material by imprinting an array of depressions, and directionally etching at the depressions a regular array of openings through the hard mask material and the stack.

Abstract: An electronic device includes first and second electrical contacts electrically coupled to a semiconductor polymer film, which includes mono-substituted diphenylhydrazone.

Abstract: One aspect of this disclosure relates to a method of building a superconductor device on a substrate, comprising depositing an imprint layer on at least a portion of the substrate. The imprint layer is imprinted to provide an imprinted portion of the imprint layer and a non-imprinted portion of the imprint layer. A superconductor layer is deposited on at least a portion of the imprinted portion of the imprint layer.

Abstract: This disclosure relates to a system and method for creating nano-object arrays. A nano-object array can be created by exposing troughs in a corrugated surface to nano-objects and depositing the nano-objects within or orienting the nano-objects with the troughs.

Abstract: This disclosure relates to a system and method for creating nanowires. A nanowire can be created by exposing layers of material in a superlattice and dissolving and transferring material from edges of the exposed layers onto a substrate. The nanowire can also be created by exposing layers of material in a superlattice and depositing material onto edges of the exposed layers.

Abstract: This disclosure relates to chemical sensors. These sensors may have a dimension of less than 100 nanometers. In addition, these sensors may comprise field-effect chemical sensors functionalized to sense a chemical.

Abstract: An electronic device includes first and second electrical contacts electrically coupled to a semiconductor polymer film, which includes mono-substituted diphenylhydrazone.

Abstract: A memory device includes a semiconducting polymer film, which includes an organic dopant. The semiconducting polymer film has a first side and a second side. The memory device also includes a first plurality of electrical conductors substantially parallel to each other coupled to the first side of the semiconducting polymer layer, and a second plurality of electrical conductors substantially parallel to each other, coupled to the second side of the semiconducting polymer layer. The first and second pluralities of electrical conductors are substantially mutually orthogonal to each other. Further, an electrical charge is localized on the organic dopant.

Abstract: A nanoscopic transistor is made by forming an oxide layer on a semiconductor substrate, applying resist, patterning the resist using imprint lithography to form a pattern aligned along a first direction, applying a first ion-masking material over the pattern, selectively lifting it off to leave a first ion mask to form a gate, forming doped regions by implanting a suitable dopant, applying another layer of resist and patterning the second resist layer using imprint lithography to form a second pattern aligned along a second direction, applying a second ion-masking material over the second pattern, selectively lifting it off to leave a second ion mask defined by the second pattern, and forming second doped regions in the substrate by implanting a suitable second dopant selectively in accordance with the second ion mask. The method may be used to make an array of nanoscopic transistors.

Abstract: A memory device includes a semiconducting polymer film, which includes an organic dopant. The semiconducting polymer film has a first side and a second side. The memory device also includes a first plurality of electrical conductors substantially parallel to each other coupled to the first side of the semiconducting polymer layer, and a second plurality of electrical conductors substantially parallel to each other, coupled to the second side of the semiconducting polymer layer. The first and second pluralities of electrical conductors are substantially mutually orthogonal to each other. Further, an electrical charge is localized on the organic dopant.

Abstract: The disclosure relates to a process including depositing an imprintable layer on a substrate. The imprintable layer is imprinted into the pattern of an imprint-fabricated ribbon. The pattern from the imprintable layer is transferred to the substrate to be used to fabricate the imprint-fabricated ribbon.

Abstract: Methods of forming thin film transistors and related systems are described. In one embodiment, a method forms source/drain material over a substrate using a low temperature formation process. A channel layer is formed over the substrate using a low temperature formation process. A gate insulating layer is formed over the substrate using a low temperature formation process. A gate is formed over the substrate using a low temperature formation process. The low temperature formation processes that are utilized are conducted at temperatures that are no greater than about 200-degrees C.

Abstract: A semiconductor device including a substrate having a dopant of a first polarity, a first semiconducting structure including a dopant of a second polarity disposed over the substrate, and having substantially planar top and side surfaces. The semiconductor device includes a first junction, formed between the first semiconducting structure and the substrate, having an area wherein at least one lateral dimension is less than about 75 nanometers.

Abstract: A sensor device and method for detecting the presence of an analyte in a fluid solution are disclosed. The sensor device system can comprise a substrate and an array of free-standing nanowires attached to the substrate. The array can include individual free-standing nanowires wherein each of the individual free-standing nanowires have a first end and a second end. The first end can, in some embodiments, be attached to the substrate and the second end unattached to the substrate. Such individual free-standing nanowires are configured for electrical communication with other individual free-standing nanowires through the first end. A signal measurement apparatus can be electrically coupled to the array of free-standing nanowires for receiving electrical information from the array of free-standing nanowires.

Abstract: A semiconductor device including a substrate having a dopant of a first polarity, a first semiconducting structure including a dopant of a second polarity disposed over the substrate, and having substantially planar top and side surfaces. The semiconductor device includes a first junction, formed between the first semiconducting structure and the substrate, having an area wherein at least one lateral dimension is less than about 75 nanometers.

Abstract: A semiconductor device including a substrate having a dopant of a first polarity, a first semiconducting structure including a dopant of a second polarity disposed over the substrate, and having substantially planar top and side surfaces. The semiconductor device includes a first junction, formed between the first semiconducting structure and the substrate, having an area wherein at least one lateral dimension is less than about 75 nanometers.

Abstract: A memory device includes a semiconducting polymer film, which includes an organic dopant. The semiconducting polymer film has a first side and a second side. The memory device also includes a first plurality of electrical conductors substantially parallel to each other coupled to the first side of the semiconducting polymer layer, and a second plurality of electrical conductors substantially parallel to each other, coupled to the second side of the semiconducting polymer layer. The first and second pluralities of electrical conductors are substantially mutually orthogonal to each other. Further, an electrical charge is localized on the organic dopant.