Patents by Inventor James Thomas Kirk

James Thomas Kirk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10486328
    Abstract: A fastening system includes a carriage moveably mounted to a frame between first and second positions extensive with and beyond a fixture. The fixture is horizontally movably mounted in the frame to receive components to be fastened of differing sizes, with slide bars vertically moveably mounted relative to the fixture and simultaneously horizontally movable with the fixture. Adjustable spacers, in the form of a body having different extents or telescopic pillars, are positioned in the frame to abut with the components received in the fixture. Wheels rotatably mounted to first and second platforms of the carriage are received in U-shaped channels of the frame, with the first and second platforms being moved by endless belts clamped thereto. Nail guns are movably mounted between vertical posts of the platforms and include a plunger which is biased against a drum carrying a belt of fasteners and include a flat board tangential to a roller having a V-shaped circumferential groove receiving the heads of nails.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: November 26, 2019
    Assignee: Palletec, LLC
    Inventors: Paul Howard Wagner, James Thomas Kirk, Jon Denney, Marcus Keith Drayton
  • Publication number: 20180215067
    Abstract: A fastening system includes a carriage moveably mounted to a frame between first and second positions extensive with and beyond a fixture. The fixture is horizontally movably mounted in the frame to receive components to be fastened of differing sizes, with slide bars vertically moveably mounted relative to the fixture and simultaneously horizontally movable with the fixture. Adjustable spacers, in the form of a body having different extents or telescopic pillars, are positioned in the frame to abut with the components received in the fixture. Wheels rotatably mounted to first and second platforms of the carriage are received in U-shaped channels of the frame, with the first and second platforms being moved by endless belts clamped thereto. Nail guns are movably mounted between vertical posts of the platforms and include a plunger which is biased against a drum carrying a belt of fasteners and include a flat board tangential to a roller having a V-shaped circumferential groove receiving the heads of nails.
    Type: Application
    Filed: April 17, 2017
    Publication date: August 2, 2018
    Inventors: Paul Howard Wagner, James Thomas Kirk, Jon Denney, Marcus Keith Drayton
  • Patent number: 8738977
    Abstract: In a system including a processor and memory coupled to the processor, a method of device failure analysis includes the steps of: upon each error detected within a test series performed on a device, the processor storing within a table in the memory an address at which the error occurred in the device and storing a bit position of each failed bit corresponding to that address; for each unique address at which at least one error occurred, determining how many different bit positions corresponding to the address failed during the test series; and based on results of the test series, determining whether the device failed the test series.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: May 27, 2014
    Assignee: Agere Systems LLC
    Inventors: David A. Brown, James Thomas Kirk, David P. Sonnier, Chris R. Stone
  • Publication number: 20080072118
    Abstract: In a system including a processor and memory coupled to the processor, a method of device failure analysis includes the steps of: upon each error detected within a test series performed on a device, the processor storing within a table in the memory an address at which the error occurred in the device and storing a bit position of each failed bit corresponding to that address; for each unique address at which at least one error occurred, determining how many different bit positions corresponding to the address failed during the test series; and based on results of the test series, determining whether the device failed the test series.
    Type: Application
    Filed: August 31, 2006
    Publication date: March 20, 2008
    Inventors: David A. Brown, James Thomas Kirk, David P. Sonnier, Chris R. Stone