Patents by Inventor Janet S. Wang

Janet S. Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11929860
    Abstract: A wireless transmit/receiver unit (WTRU) is configured to receive sounding reference signal (SRS) configuration information. The SRS configuration information indicates a plurality of SRS configurations and indicates antenna transmission information. The WTRU is configured to receive SRS trigger information. The SRS trigger information comprises an indication to trigger transmission of one of the plurality of SRS configurations. The WTRU is configured to transmit a plurality of SRS associated with the indication in the SRS trigger information and based on the SRS configuration information. At least a first SRS of the plurality of SRS is transmitted over a first antenna port in a first symbol and at least a second SRS of the plurality of SRS is transmitted over a second antenna port in a second symbol.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: March 12, 2024
    Assignee: InterDigital Patent Holdings, Inc.
    Inventors: Janet A. Stern-Berkowitz, Chang-Soo Koo, Peter S. Wang, Sung-Hyuk Shin, John W. Haim, Stephen G. Dick, Mihaela C. Beluri
  • Patent number: 6541816
    Abstract: One aspect of the present invention relates to a non-volatile semiconductor memory device, containing a substrate, the substrate having a core region and a periphery region; a charge trapping dielectric over the core region of the substrate; a gate dielectric in the periphery region of the substrate; buried bitlines under the charge trapping dielectric in the core region; and wordlines over the charge trapping dielectric in the core region, wherein the core region is substantially planar.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: April 1, 2003
    Assignees: Advanced Micro Devices, Inc., Fujitsu Limited
    Inventors: Mark T. Ramsbey, Jean Y. Yang, Hidehiko Shiraiwa, Michael A. Van Buskirk, David M. Rogers, Ravi S. Sunkavalli, Janet S. Wang, Narbeh Derhacobian
  • Publication number: 20020063277
    Abstract: One aspect of the present invention relates to a non-volatile semiconductor memory device, containing a substrate, the substrate having a core region and a periphery region; a charge trapping dielectric over the core region of the substrate; a gate dielectric in the periphery region of the substrate; buried bitlines under the charge trapping dielectric in the core region; and wordlines over the charge trapping dielectric in the core region, wherein the core region is substantially planar.
    Type: Application
    Filed: June 27, 2001
    Publication date: May 30, 2002
    Inventors: Mark T. Ramsbey, Jean Y. Yang, Hidehiko Shiraiwa, Michael A. Van Buskirk, David M. Rogers, Ravi S. Sunkavalli, Janet S. Wang, Narbeh Derhacobian
  • Patent number: 6172909
    Abstract: A method to tighten the threshold voltage distribution curve in a memory device composed of multiple memory cells organized in rows and columns by soft programming each memory cell. Soft programming voltages that utilize the hot-carrier mechanism are selected and are applied sequentially to memory cells in wordlines. The soft programming voltages include a ramped voltage VGS of <3 volts, a VDS of <5 volts and a Vsub of <0 volts. The soft programming voltages are applied for a time period of <10 microseconds. The VT distribution is reduced to a maximum width of <2 volts. The soft programming is applied to the memory cells after the memory cells have been verified as having been erased and a having been overerase corrected.
    Type: Grant
    Filed: August 9, 1999
    Date of Patent: January 9, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Sameer S. Haddad, Janet S. Wang