Patents by Inventor Jaynal Molla
Jaynal Molla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10396006Abstract: Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a base flange, retention posts integrally formed with the base flange and extending from the flange frontside in a direction opposite the flange backside, and retention tabs having openings through which the retention posts are received. A molded package body is bonded to the base flange and envelopes, at least in substantial part, the retention posts and the retention tabs. The molded air cavity package further includes package leads extending from the molded package body. In certain implementations, the package leads and the retention tabs comprise singulated portions of a leadframe. Additionally or alternatively, the retention posts may be staked or otherwise physically deformed in a manner preventing disengagement of the retention posts from the retention tabs along a centerline of the molded air cavity package.Type: GrantFiled: October 18, 2018Date of Patent: August 27, 2019Assignee: NXP USA, Inc.Inventors: Audel Sanchez, Lakshminarayan Viswanathan, Fernando A. Santos, Jaynal A. Molla
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Publication number: 20190206759Abstract: Microelectronic systems and components having integrated heat dissipation posts are disclosed, as are methods for fabricating such microelectronic systems and components. In various embodiments, the microelectronic system includes a substrate having a frontside, a socket cavity, and inner cavity sidewalls defining the socket cavity. A microelectronic component is seated on the frontside of the substrate such that a heat dissipation post, which projects from the microelectronic component, is received in the socket cavity and separated from the inner cavity sidewalls by a peripheral clearance. The microelectronic system further includes a bond layer contacting the inner cavity sidewalls, contacting an outer peripheral portion of the heat dissipation post, and at least partially filling the peripheral clearance.Type: ApplicationFiled: March 7, 2019Publication date: July 4, 2019Inventors: Lakshminarayan Viswanathan, Mahesh K. Shah, Lu Li, David Abdo, Geoffrey Tucker, Carl Emil D'Acosta, Jaynal A. Molla, Justin Eugene Poarch, Paul Hart
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Publication number: 20190148138Abstract: Microelectronic systems having embedded heat dissipation structures are disclosed, as are methods for fabricating such microelectronic systems. In various embodiments, the method includes the steps or processes of obtaining a substrate having a tunnel formed therethrough, attaching a microelectronic component to a frontside of the substrate at a location covering the tunnel, and producing an embedded heat dissipation structure at least partially within the tunnel after attaching the microelectronic component to the substrate. The step of producing may include application of a bond layer precursor material into the tunnel and onto the microelectronic component from a backside of the substrate. The bond layer precursor material may then be subjected to sintering process or otherwise cured to form a thermally-conductive component bond layer in contact with the microelectronic component.Type: ApplicationFiled: November 6, 2018Publication date: May 16, 2019Applicant: NXP USA, INC.Inventors: JAYNAL A. MOLLA, LAKSHMINARAYAN VISWANATHAN, GEOFFREY TUCKER
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Patent number: 10269678Abstract: Microelectronic systems having integrated heat dissipation posts are disclosed, as are methods for fabricating such microelectronic systems. In various embodiments, the method includes the step or process of obtaining a microelectronic component from which a heat dissipation post projects. The microelectronic component is placed or seated on a substrate, such as a multilayer printed circuit board, having a socket cavity therein. The heat dissipation post is received in the socket cavity as the microelectronic component is seated on the substrate. Concurrent with or after seating the microelectronic component, the microelectronic component and the heat dissipation post are bonded to the substrate. In certain embodiments, the heat dissipation post may be dimensioned or sized such that, when the microelectronic component is seated on the substrate, the heat dissipation post occupies a volumetric majority of the socket cavity.Type: GrantFiled: December 5, 2017Date of Patent: April 23, 2019Assignee: NXP USA, Inc.Inventors: Lakshminarayan Viswanathan, Mahesh K. Shah, Lu Li, David Abdo, Geoffrey Tucker, Carl Emil D'Acosta, Jaynal A. Molla, Justin Eugene Poarch, Paul Hart
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Publication number: 20190109060Abstract: Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a molded package body having an upper peripheral edge portion, an air cavity around which the upper peripheral edge portion extends, and a cover piece bonded to the upper peripheral edge portion to enclose the air cavity. The cover piece has a lower peripheral edge portion, which cooperates with the upper peripheral edge portion to define a cover-body interface. The cover-body interface includes an annular channel extending around the cover-body interface, as taken about the package centerline, and first and second hardstop features formed on the upper peripheral edge portion of the molded package body and on the lower peripheral edge portion of the cover piece, respectively. The hardstop features contact to determine a vertical height of the annular channel, as taken along the package centerline.Type: ApplicationFiled: December 5, 2018Publication date: April 11, 2019Applicant: NXP USA, INC.Inventors: AUDEL SANCHEZ, LAKSHMINARAYAN VISWANATHAN, FERNANDO A. SANTOS, JAYNAL A. MOLLA
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Publication number: 20190098743Abstract: High thermal performance microelectronic modules containing sinter-bonded heat dissipation structures are provided, as are methods for the fabrication thereof. In various embodiments, the method includes the steps or processes of providing a module substrate, such as a circuit board, including a cavity having metallized sidewalls. A sinter-bonded heat dissipation structure is formed within the cavity. The sintered-bonded heat dissipation structure is formed, at least in part, by inserting a prefabricated thermally-conductive body, such as a metallic (e.g., copper) coin into the cavity. A sinter precursor material (e.g., a metal particle-containing paste) is dispensed or otherwise applied into the cavity and onto surfaces of the prefabricated thermally-conductive body before, after, or concurrent with insertion of the prefabricated thermally-conductive body.Type: ApplicationFiled: November 28, 2018Publication date: March 28, 2019Applicant: NXP USA, INC.Inventors: JAYNAL A. MOLLA, LAKSHMINARAYAN VISWANATHAN, ELIE A. MAALOUF, GEOFFREY TUCKER
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Publication number: 20190051571Abstract: Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a base flange, retention posts integrally formed with the base flange and extending from the flange frontside in a direction opposite the flange backside, and retention tabs having openings through which the retention posts are received. A molded package body is bonded to the base flange and envelopes, at least in substantial part, the retention posts and the retention tabs. The molded air cavity package further includes package leads extending from the molded package body. In certain implementations, the package leads and the retention tabs comprise singulated portions of a leadframe. Additionally or alternatively, the retention posts may be staked or otherwise physically deformed in a manner preventing disengagement of the retention posts from the retention tabs along a centerline of the molded air cavity package.Type: ApplicationFiled: October 18, 2018Publication date: February 14, 2019Applicant: NXP USA, INC.Inventors: AUDEL SANCHEZ, LAKSHMINARAYAN VISWANATHAN, FERNANDO A. SANTOS, JAYNAL A. MOLLA
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Publication number: 20190043774Abstract: Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a base flange, retention posts integrally formed with the base flange and extending from the flange frontside in a direction opposite the flange backside, and retention tabs having openings through which the retention posts are received. A molded package body is bonded to the base flange and envelopes, at least in substantial part, the retention posts and the retention tabs. The molded air cavity package further includes package leads extending from the molded package body. In certain implementations, the package leads and the retention tabs comprise singulated portions of a leadframe. Additionally or alternatively, the retention posts may be staked or otherwise physically deformed in a manner preventing disengagement of the retention posts from the retention tabs along a centerline of the molded air cavity package.Type: ApplicationFiled: August 7, 2017Publication date: February 7, 2019Applicant: NXP USA, INC.Inventors: AUDEL SANCHEZ, LAKSHMINARAYAN VISWANATHAN, FERNANDO A. SANTOS, JAYNAL A. MOLLA
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Publication number: 20190043775Abstract: Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a molded package body having an upper peripheral edge portion, an air cavity around which the upper peripheral edge portion extends, and a cover piece bonded to the upper peripheral edge portion to enclose the air cavity. The cover piece has a lower peripheral edge portion, which cooperates with the upper peripheral edge portion to define a cover-body interface. The cover-body interface includes an annular channel extending around the cover-body interface, as taken about the package centerline, and first and second hardstop features formed on the upper peripheral edge portion of the molded package body and on the lower peripheral edge portion of the cover piece, respectively. The hardstop features contact to determine a vertical height of the annular channel, as taken along the package centerline.Type: ApplicationFiled: August 7, 2017Publication date: February 7, 2019Applicant: NXP USA, INC.Inventors: AUDEL SANCHEZ, LAKSHMINARAYAN VISWANATHAN, FERNANDO A. SANTOS, JAYNAL A. MOLLA
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Patent number: 10199303Abstract: Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a molded package body having an upper peripheral edge portion, an air cavity around which the upper peripheral edge portion extends, and a cover piece bonded to the upper peripheral edge portion to enclose the air cavity. The cover piece has a lower peripheral edge portion, which cooperates with the upper peripheral edge portion to define a cover-body interface. The cover-body interface includes an annular channel extending around the cover-body interface, as taken about the package centerline, and first and second hardstop features formed on the upper peripheral edge portion of the molded package body and on the lower peripheral edge portion of the cover piece, respectively. The hardstop features contact to determine a vertical height of the annular channel, as taken along the package centerline.Type: GrantFiled: August 7, 2017Date of Patent: February 5, 2019Assignee: NXP USA, INC.Inventors: Audel Sanchez, Lakshminarayan Viswanathan, Fernando A. Santos, Jaynal A. Molla
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Patent number: 10199302Abstract: Molded air cavity packages and methods for producing molded air cavity packages are disclosed. In one embodiment, the molded air cavity package includes a base flange, retention posts integrally formed with the base flange and extending from the flange frontside in a direction opposite the flange backside, and retention tabs having openings through which the retention posts are received. A molded package body is bonded to the base flange and envelopes, at least in substantial part, the retention posts and the retention tabs. The molded air cavity package further includes package leads extending from the molded package body. In certain implementations, the package leads and the retention tabs comprise singulated portions of a leadframe. Additionally or alternatively, the retention posts may be staked or otherwise physically deformed in a manner preventing disengagement of the retention posts from the retention tabs along a centerline of the molded air cavity package.Type: GrantFiled: August 7, 2017Date of Patent: February 5, 2019Assignee: NXP USA, INC.Inventors: Audel Sanchez, Lakshminarayan Viswanathan, Fernando A. Santos, Jaynal A. Molla
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Publication number: 20190013242Abstract: A method of wafer dicing includes singulating dies from a semiconductor wafer. The method further includes depositing a metal layer on back sides of the singulated dies, wherein a portion of the metal layer continues beyond the backs sides of the singulated dies to deposit at least partially on lateral sides of the singulated dies. A packaged die includes a semiconductor die and a metal outer layer deposited on the back side of the semiconductor die and on a portion of the lateral side of the semiconductor die nearest the back side. The packaged die further includes a substrate mounted to the back side of the semiconductor die a die attach material that bonds the substrate to the metal outer layer deposited on the semiconductor die, wherein the metal outer layer and the die attach material surround the back edge of the semiconductor die.Type: ApplicationFiled: July 5, 2017Publication date: January 10, 2019Inventors: Jaynal A. Molla, Lakshminarayan Viswanathan, David Abdo, Colby Greg Rampley, Fernando A. Santos
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Patent number: 10141182Abstract: Microelectronic systems having embedded heat dissipation structures are disclosed, as are methods for fabricating such microelectronic systems. In various embodiments, the method includes the steps or processes of obtaining a substrate having a tunnel formed therethrough, attaching a microelectronic component to a frontside of the substrate at a location covering the tunnel, and producing an embedded heat dissipation structure at least partially within the tunnel after attaching the microelectronic component to the substrate. The step of producing may include application of a bond layer precursor material into the tunnel and onto the microelectronic component from a backside of the substrate. The bond layer precursor material may then be subjected to sintering process or otherwise cured to form a thermally-conductive component bond layer in contact with the microelectronic component.Type: GrantFiled: November 13, 2017Date of Patent: November 27, 2018Assignee: NXP USA, INC.Inventors: Jaynal A. Molla, Lakshminarayan Viswanathan, Geoffrey Tucker
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Patent number: 9941210Abstract: An embodiment of a semiconductor die includes a base semiconductor substrate and an electrically conductive through substrate via (TSV) extending between the surfaces of the base semiconductor substrate. The bottom surface of the base semiconductor substrate includes a recessed region proximate to the TSV so that an end of the TSV protrudes from the bottom surface, and so that the TSV sidewall has an exposed portion at the protruding end of the TSV. Back metal, consisting of one or more metallic layers, is deposited on the bottom surface of the base semiconductor substrate and in contact with the TSV. The back metal can include a gold layer, a sintered metallic layer, and/or a plurality of other conductive layers. The die may be attached to a substrate using solder, another sintered metallic layer, or other materials.Type: GrantFiled: December 27, 2016Date of Patent: April 10, 2018Assignee: NXP USA, INC.Inventors: Lakshminarayan Viswanathan, Jaynal A. Molla, Mali Mahalingam, Colby Rampley
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Publication number: 20180082915Abstract: Air cavity packages and methods for producing air cavity packages containing sintered bonded components, multipart window frames, and/or other unique structural features are disclosed. In one embodiment, a method for fabricating an air cavity package includes the step or process of forming a first metal particle-containing precursor layer between a base flange and a window frame positioned over the base flange. A second metal particle-containing precursor layer is further formed between the base flange and a microelectronic device positioned over the base flange. The metal particle-containing precursor layers are sintered substantially concurrently at a maximum processing temperature less than melt point(s) of metal particles within the layers to produce a first sintered bond layer from the first precursor layer joining the window frame to the base flange and to produce a second sintered bond layer from the second precursor layer joining the microelectronic device to the base flange.Type: ApplicationFiled: September 19, 2016Publication date: March 22, 2018Applicant: FREESCALE SEMICONDUCTOR INC.Inventors: LAKSHMINARAYAN VISWANATHAN, JAYNAL A. MOLLA, DAVID ABDO, MALI MAHALINGAM, CARL D'ACOSTA
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Patent number: 9922894Abstract: Air cavity packages and methods for producing air cavity packages containing sintered bonded components, multipart window frames, and/or other unique structural features are disclosed. In one embodiment, a method for fabricating an air cavity package includes the step or process of forming a first metal particle-containing precursor layer between a base flange and a window frame positioned over the base flange. A second metal particle-containing precursor layer is further formed between the base flange and a microelectronic device positioned over the base flange. The metal particle-containing precursor layers are sintered substantially concurrently at a maximum processing temperature less than melt point(s) of metal particles within the layers to produce a first sintered bond layer from the first precursor layer joining the window frame to the base flange and to produce a second sintered bond layer from the second precursor layer joining the microelectronic device to the base flange.Type: GrantFiled: September 19, 2016Date of Patent: March 20, 2018Assignee: NXP USA, INC.Inventors: Lakshminarayan Viswanathan, Jaynal A. Molla, David Abdo, Mali Mahalingam, Carl D'Acosta
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Patent number: 9875987Abstract: An electronic device includes a semiconductor die having a lower surface, a sintered metallic layer underlying the lower surface of the semiconductor die, a conductive layer underlying the sintered metallic layer, and a conductive substrate underlying the conductive layer.Type: GrantFiled: August 25, 2016Date of Patent: January 23, 2018Assignee: NXP USA, INC.Inventors: Lakshminarayan Viswanathan, Jaynal A. Molla
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Publication number: 20180012815Abstract: A method of manufacturing a packaged semiconductor device includes forming an assembly by placing a semiconductor die over a substrate with a die attach material between the semiconductor die and the substrate. A conformal structure which includes a pressure transmissive material contacts at least a portion of a top surface of the semiconductor die. A pressure is applied to the conformal structure and in turn, the pressure is transmitted to the top surface of the semiconductor die by the pressure transmissive material. While the pressure is applied, concurrently encapsulating the assembly with a molding compound and exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter.Type: ApplicationFiled: September 20, 2017Publication date: January 11, 2018Inventors: LI LI, Jaynal A. Molla, Lakshminarayan Viswanathan
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Patent number: 9799580Abstract: A method of manufacturing a packaged semiconductor device includes forming an assembly by placing a semiconductor die over a substrate with a die attach material between the semiconductor die and the substrate. A conformal structure which includes a pressure transmissive material contacts at least a portion of a top surface of the semiconductor die. A pressure is applied to the conformal structure and in turn, the pressure is transmitted to the top surface of the semiconductor die by the pressure transmissive material. While the pressure is applied, concurrently encapsulating the assembly with a molding compound and exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter.Type: GrantFiled: March 24, 2016Date of Patent: October 24, 2017Assignee: NXP USA, INC.Inventors: Li Li, Jaynal A. Molla, Lakshminarayan Viswanathan
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Publication number: 20170278763Abstract: A method of manufacturing a packaged semiconductor device includes forming an assembly by placing a semiconductor die over a substrate with a die attach material between the semiconductor die and the substrate. A conformal structure which includes a pressure transmissive material contacts at least a portion of a top surface of the semiconductor die. A pressure is applied to the conformal structure and in turn, the pressure is transmitted to the top surface of the semiconductor die by the pressure transmissive material. While the pressure is applied, concurrently encapsulating the assembly with a molding compound and exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter.Type: ApplicationFiled: March 24, 2016Publication date: September 28, 2017Inventors: Li LI, Jaynal A. MOLLA, Lakshminarayan VISWANATHAN