Patents by Inventor Je Min JEON

Je Min JEON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11563440
    Abstract: An analog-to-digital conversion device and analog-to-digital conversion method thereof are provided. The analog-to-digital conversion device includes an analog circuit configured to output an analog input signal, and an analog-to-digital converter configured to receive the analog input signal and configured to outputting a digital output signal corresponding to the analog input signal with the use of first and second capacitor arrays, each of the first and second capacitor arrays including a first capacitor having a calibration capacitor connected thereto and a second capacitor having no calibration capacitor connected thereto, wherein the analog-to-digital converter is configured to calibrate the capacitance of the first capacitor by providing a first calibration voltage to the calibration capacitor and is configured to output the digital output signal corresponding to the analog input signal with the use of the calibrated capacitance of the first capacitor.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: January 24, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tai Ji An, Jun Sang Park, Gil Cho Ahn, Seung Hoon Lee, Yong Tae Kim, Kee Ho Ryu, Seung Hoon Lee, Je Min Jeon
  • Publication number: 20220077867
    Abstract: An analog-to-digital conversion device and analog-to-digital conversion method thereof are provided. The analog-to-digital conversion device includes an analog circuit configured to output an analog input signal, and an analog-to-digital converter configured to receive the analog input signal and configured to outputting a digital output signal corresponding to the analog input signal with the use of first and second capacitor arrays, each of the first and second capacitor arrays including a first capacitor having a calibration capacitor connected thereto and a second capacitor having no calibration capacitor connected thereto, wherein the analog-to-digital converter is configured to calibrate the capacitance of the first capacitor by providing a first calibration voltage to the calibration capacitor and is configured to output the digital output signal corresponding to the analog input signal with the use of the calibrated capacitance of the first capacitor.
    Type: Application
    Filed: June 3, 2021
    Publication date: March 10, 2022
    Applicants: Samsung Electronics Co., Ltd., Sogang University Research & Business Development Foundation
    Inventors: Tai Ji AN, Jun Sang PARK, Gil Cho AHN, Seung Hoon LEE, Yong Tae KIM, Kee Ho RYU, Seung Hoon LEE, Je Min JEON