Abstract: A method for producing a structure includes bonding two substrates facing one another by crushing a closed peripheral sealing strip located between the two substrates, the closed peripheral sealing strip delineating a closed cavity between the substrates. A microsystem is disposed on one of the substrates within the closed cavity. Before crushing, the sealing strip includes perforated patterns delineating a plurality of voids inside the strip.

Abstract: A microelectronic chip comprises two parallel main faces and side faces. At least one of the faces comprises a recess provided with at least one electrical connection element and forming a housing for a wire element. The wire element simultaneously constitutes both an electrical connection between the chip and the outside via said connection element and a flexible mechanical support for said chip.

Abstract: The invention relates to a method for fabricating chip elements provided with a groove from devices formed on a wafer. The method comprises the steps consisting in, depositing a sacrificial film on the wafer so as to leave a central part of each device exposed and to cover an edge of the device at the level of which the groove is to be formed; applying a mold on the sacrificial film; injecting a hardenable material into the mold; hardening the hardenable material; dicing the wafer between the devices; and eliminating the sacrificial film.

Abstract: The method enables an assembly of chips, initially formed on a wafer, to be formed. Each chip comprises two parallel main faces joined by side faces. At least one of the side faces comprises at least one groove for housing a thread element. The wafer is first of all stuck onto a flexible film and the chips are then cut. The film is then deformed to space the chips apart from one another and to make the grooves accessible. A daisy chain is then formed joining the chips via at least one thread element, each chip being inserted in the daisy chain by inserting the thread in the groove of said chip and then removing the chip from the deformable film.

Abstract: Assembly of at least one microelectronic chip with a wire element, the chip comprising a groove for embedment of the wire element. The wire element is a strand with a longitudinal axis substantially parallel to the axis of the groove, comprising at least two electrically conducting wires covered with insulator. The chip comprises at least one electrically conducting bump in the groove, this bump being in electric contact with a stripped area of a single one of the electrically conducting wires of the strand.

Abstract: A first step of the method for assembling a wire element with an electronic chip comprises arranging the wire element in a groove of the chip delineated by a first element and a second element, joined by a link element comprising a plastically deformable material, and a second step then comprises clamping the first and second elements to deform the link element until the wire element is secured in the groove.

Abstract: The invention pertains to a method for determining the presence or absence of at least one chemical substance in a liquid medium, comprising a contacting step of said liquid medium with a device comprising at least one substrate coated, in whole or in part on at least one of its sides, with at least one layer comprising material able to be degraded fully or partly by said chemical substance, said material being chosen from among metals, metal alloys, metal oxides.

Abstract: This invention relates to a stacked electronic device composed of stacked electronic components (120, 130) distributed on one or several added-on levels (N2, N3) each added on the preceding level starting from a base level (N1) possibly containing at least one electronic component (110). At least one electrolytic connection pad of a first type (10.1) on an add-on level (N2) directly connects a conducting element (c1) placed on one face of an electronic component (120) on an add-on level (N2) to a conducting element (z1) placed on an opposite face of a neighbouring level (N1) while at least one electrolytic connection pad of a second type (20.1) on the add-on level (N2) passes through a coating layer (220) coating the sides of the electronic component (120) on the add-on level (N2) and directly electrically connects two conducting elements (z1, z2) located on each side of said coating layer (220).

Abstract: A method for using of a fabric comprising a material chosen from metals, metallic alloys, polymers, inorganic compounds and mixtures thereof, which material is capable of detecting the presence of a chemical substance, for the detection of said chemical substance.

Abstract: The assembly comprises at least one microelectronic chip having two parallel main surfaces and lateral surfaces, at least one of the lateral faces comprising a longitudinal groove housing a wire element having an axis parallel to the longitudinal axis of the groove. The groove is delineated by at least two side walls. The wire element is secured to the chip at the level of a clamping area between at least one bump arranged on one of the side walls, and the side wall of the groove opposite said bump. The clamping area has a smaller height than the diameter of the wire element and a free area is arranged laterally to the bump along the longitudinal axis of the groove. The free area has a height, corresponding to the distance separating the two side walls, that is greater than the diameter of the wire element.

Abstract: The invention relates to the fabrication of radiofrequency transmission/reception devices. The invention makes provision for: the making of radiofrequency transmission/reception chips devoid of antennas; the connecting in series of the chips by at least two conducting wire elements whose respective lengths between two neighboring chips are chosen as a function of the transmission/reception frequency, each element contacting electrically at least one terminal of a chip and ensuring an at least temporary function of mechanical holding of the chips chainwise; and the cutting at regular intervals of the serial connection to form, for each chip, two strands of an antenna of the device.

Abstract: The method relates to production of a set of chips mechanically interconnected by means of a flexible connection. The chips, integrated on a substrate, each comprise a receiving area. The chips of the set are connected in series in the receiving areas by a connecting element. The chips are then released, the connecting element forming a flexible connection.

Abstract: The method enables an assembly of chips, initially formed on a wafer, to be formed. Each chip comprises two parallel main faces joined by side faces. At least one of the side faces comprises at least one groove for housing a thread element. The wafer is first of all stuck onto a flexible film and the chips are then cut. The film is then deformed to space the chips apart from one another and to make the grooves accessible. A daisy chain is then formed joining the chips via at least one thread element, each chip being inserted in the daisy chain by inserting the thread in the groove of said chip and then removing the chip from the deformable film.

Abstract: A microelectronic chip comprises two parallel main faces and side faces. At least one of the faces comprises a recess provided with at least one electrical connection element and forming a housing for a wire element. The wire element simultaneously constitutes both an electrical connection between the chip and the outside via said connection element and a flexible mechanical support for said chip.

Abstract: A method producing conductive rods localized on conductive blocks of an electronic component.

Abstract: The structure comprises facing substrates bonded to one another by crushing a closed peripheral sealing strip delineating a closed cavity in which a microsystem is disposed between the substrates. Before crushing, the sealing strip comprises perforated patterns delineating a plurality of voids inside the strip.

Abstract: This invention relates to a process for manufacturing an anisotropic conducting film comprising a layer of electrically insulating material and conducting through inserts, the process including the following steps: a) formation on a substrate of at least one layer of material with through holes, the layer being called the perforated layer, b) filling of the through holes to form conducting inserts. The process also includes production of a mask partially covering a first end of the conducting inserts and etching of the unmasked part of the ends of the conducting inserts so as to obtain conducting inserts with pointed ends. The invention is applicable to the formation of components (chips, integrated circuits) with a high interconnections density.

Abstract: A method producing conductive rods localized on conductive blocks of an electronic component.

Abstract: The electrodes are formed by surface coating and cold compression on metal strips. They are then assembled, by hot pressing, with an electrolytic membrane. The metal strips are then removed, preferably by mechanical detachment. Current collectors are then formed on each of the electrodes by PVD type techniques that are conventional in microelectronics. The resulting thin micro-battery with high surface capacity can then be integrated in an integrated circuit, in particular by bonding by means of indium connecting balls.

Abstract: This invention relates to a process for manufacturing an anisotropic conducting film comprising a layer of electrically insulating material and conducting through inserts, the said process comprising the following steps: a) formation on a substrate of at least one layer of material with through holes, the said layer being called the perforated layer, b) filling of the through holes to form conducting inserts. The process also comprises production of a mask partially covering a first end of the conducting inserts and etching of the unmasked part of the ends of the conducting inserts so as to obtain conducting inserts with pointed ends. The invention is applicable to the formation of components (chips, integrated circuits) with a high interconnections density.