Abstract: A method and a medical device for implementing a dual-chamber pacing mode without ventricular pacing are disclosed. The method includes: obtaining pacing mode information configured by a user; controlling a dual-chamber pacemaker to operate in an ADD mode and detecting whether there is a need for delivering a pace; and performing a predetermined interruption process if a need for delivering a pace is detected. The predetermined interruption process includes: 2041) determining whether a chamber to be subsequently paced is a ventricle; 2042) if it is determined that the chamber to be subsequently paced is a ventricle, determining whether there is a need for delivering a real ventricular pace; 2043) if delivery of a real ventricular pace is not needed, delivering a virtual ventricular pace VVP and resetting a first atrial escape interval; and returning after the predetermined interruption process is terminated.

Abstract: A method and a medical device for implementing a dual-chamber pacing mode without ventricular pacing are disclosed. The method includes: obtaining pacing mode information configured by a user; controlling a dual-chamber pacemaker to operate in an ADD mode and detecting whether there is a need for delivering a pace; and performing a predetermined interruption process if a need for delivering a pace is detected. The predetermined interruption process includes: 2041) determining whether a chamber to be subsequently paced is a ventricle; 2042) if it is determined that the chamber to be subsequently paced is a ventricle, determining whether there is a need for delivering a real ventricular pace; 2043) if delivery of a real ventricular pace is not needed, delivering a virtual ventricular pace VVP and resetting a first atrial escape interval; and returning after the predetermined interruption process is terminated.

Abstract: A cardiac pacemaker system and control methods thereof are disclosed, wherein pacing logic and timing functions are enabled by a microprocessor and sensing and pulse delivery capabilities are accomplished by a peripheral IC. The microprocessor communicates with the peripheral IC via serial interfaces and electrical level signals. This allows for full use of internal resources of the modern ultra-low power microprocessor, lowering the dependence of the system on the peripheral IC and reducing the effort required for digital circuit design.

Abstract: A medical device for treating cardiac arrhythmia includes a microprocessor. A MCU configures the medical device to operate in a modified DVI (R) mode in which: when receiving a signal indicating the sensing of an atrial event, the MCU sets a PANP interval and sends to a time control unit a signal; if a scheduled post-ventricular atrial escaping interval is to end at a time not within the PANP internal, the MCU sends respective signals to a pacing control/generation unit and the time control unit to dictate the pacing control/generation unit and control a second timing unit to use a PAVI as a next ventricular escape interval; and if the scheduled post-ventricular atrial escaping interval is to end within the PANP interval, the MCU sends a signal to the time control unit, controlling the second timing unit to use the PAVI as the next ventricular escape interval.

Abstract: A medical device for treating cardiac arrhythmia is disclosed, including: a microprocessor (8) and a digital/analog module (9).

Abstract: A cardiac pacemaker system and control methods thereof are disclosed, wherein pacing logic and timing functions are enabled by a microprocessor and sensing and pulse delivery capabilities are accomplished by a peripheral IC. The microprocessor communicates with the peripheral IC via serial interfaces and electrical level signals. This allows for full use of internal resources of the modern ultra-low power microprocessor, lowering the dependence of the system on the peripheral IC and reducing the effort required for digital circuit design.

Abstract: A power management system for an implantable device is disclosed. One application is an implantable cardioverter/defibrillator. Charging circuits for implantable cardioverter/defibrillators require relatively large currents from the power supply. The present power management system provides extended device operation and reduced charge cycle time. The present system monitors both current and voltage drawn from the power supply to prevent a loss of system voltage. Elective replacement indication is performed using charging information provided by the present power management system.

Abstract: A deterministic and jitter-free dual chamber brady pacemaker utilizes both a programmed microprocessor and a hardware state machine, both of which are coupled to a real time clock (RTC), random access memory (RAM) and a common escape interval timer. Time of occurrence (TOC) data representative of the time and nature of atrial and ventricular sensed events and pacing events is stored in the RAM. Escape interval periods are timed by the escape interval timer. The microprocessor is operable in both an active mode and an inactive mode without interrupts. In response to the receipt of wakeup commands, the microprocessor operates in the active mode and uses the TOC data from the RAM to reset the escape interval timer to a desired next event interval. The hardware state machine uses the common escape interval timer for timing timeout events and atrial and ventricular sensed events such that pacing pulses are delivered in a determinate manner.

Abstract: A tiered therapy cardiac detection system is provided for a medical device that senses cardiac signals representative of beat-to-beat intervals and delivers at least one therapy in response to a detected cardiac dysrhythmia corresponding to one of a plurality of programmed zones of heart rates. The detection system includes a global counter that counts at least all beat-to-beat intervals indicating a rate greater than a programmed threshold value representative of a minimum heart rate for delivering any therapy once an initial threshold condition is met. A plurality of window memories and parameter memories are provided in the device. Each window memory corresponds to a given one of the zones and stores an indication of whether each of a last N cardiac signals are within that zone. Each parameter memory corresponds to a given one of the zones and stores a programmed trigger value of the global counter required in order for a therapy in that zone to be delivered.

Abstract: A power management system for an implantable device is disclosed. One application is an implantable cardioverter/defibrillator. Charging circuits for implantable cardioverter/defibrillators require relatively large currents from the power supply. The present power management system provides extended device operation and reduced charge cycle time. The present system monitors both current and voltage drawn from the power supply to prevent a loss of system voltage. Elective replacement indication is performed using charging information provided by the present power management system.

Abstract: An arrhythmia detector includes a delta modulator which digitizes the ECG signal and produces a serial digital signal that represents the input ECG signal. A microprocessor classifies the signal as having no slope, positive slope, or negative slope. A finite state machine model in the microprocessor uses the positive slope, negative slope, or no slope information to determine the number of times an isoelectric line segment is present in the ECG signal. By accumulating the line-counts or number of line segments over a two-second period, a determination can be made whether the ECG signal has been in isoelectric line less than a threshold. For two out of three 2 second periods, if the percentage of isoelectric time is less than the ventricular fibrillation threshold then a ventricular fibrillation signal can be generated.

Abstract: An automatic implantable defibrillator/cardioverter having a non-committed defibrillation/cardioversion algorithm. The defibrillator/cardioverter includes an ECG amplifier with automatic gain control (AGC) which detects the electrical activity of the heart for analysis by a cardiac condition detector. Logic is provided which receives input from the ECG amplifier and the cardiac condition detector for analyzing the heart activity. The non-committed defibrillation algorithm sensing begins upon the determination of an arrhythmia. The capacitor is charged while the heart activity is simultaneously monitored. After the capacitor is charged, a check is made on the duration of the last detected R-R interval while so charging the capacitor, and a comparison is made between this R-R interval and a preset value. If the last R-R interval is greater than the preset value, a non-committing period is entered which lasts approximately 2 seconds.