Abstract: A memory system includes: a plurality of nonvolatile memory devices each including a plurality of memory blocks; and a controller configured to select an innocent open super block among super blocks formed across the nonvolatile memory devices when determining that sequential write operations are to be performed, and perform the sequential write operations on the innocent open super block.

Abstract: A data storage device includes a plurality of dies, each of the dies comprising a plurality of planes, and each of the planes comprising a plurality of memory blocks; and a controller controlling an operation of the memory device, wherein the controller generates a super block including memory blocks, among the plurality of memory blocks, determining whether there is a replacement block obtained by way-interleaving, when a bad block is present in the generated super block, and regenerating the super block by replacing the bad block with a replacement block obtained through channel-interleaving, when there is no replacement block being obtained by way-interleaving, wherein the controller assigns the regenerated super block for an operation when data being obtained by channel-interleaving is received, and controlling the memory device to store the data in the regenerated super block.

Abstract: A memory system includes a nonvolatile memory device; and a controller configured to control the nonvolatile memory device, wherein the controller is configured to: receive a system information request including a command and an argument from a host device; determine suitability of the system information request based on a fixed key included in the argument in response to the command; encrypt system information based the argument when the system information request is suitable; and transmit the encrypted system information to the host device.

Abstract: A memory system includes a memory device including plural memory blocks divided into a system region, a user data region and a reserved region. The system region includes a first block storing original firmware and a second block storing copied firmware, and the reserved region includes a dedicated test block having an operational characteristic that substantially the same as that of the second block. The memory system includes a controller configured to access the dedicated test block for determining a status of the second block based on an operation state of the dedicated test block, and to update both the dedicated test block and the second block based on the status of the second block.

Abstract: An operation method includes: requesting a request map segment including request map data from the memory device; marking data in a marking region which is determined based on a caching order of a plurality of items of map data included in the request map data; caching the plurality of items of map data read from the memory device in the caching order; and acquiring the request map data among the cached data, depending on whether the data stored in the marking region is changed.

Abstract: A data storage device may include: a storage; and a controller configured to control data input/output on the storage according to a request transferred from a host device, and provide at least some of read data to the host device before a preset read timeout threshold time is completely consumed, when an interrupt event occurs before a processing of a read request of the host device is completed.

Abstract: Provided is an operation method of a controller which controls a memory device. The operation method may include: determining a caching order of plural pieces of map data included in a request map segment including request map data; requesting the request map segment from the memory device; marking data in a marking region which is determined based on the caching order; caching, in the caching order, the plural pieces of map data read from the memory device; and acquiring the request map data from the cached data, depending on whether the data stored in the marking region is changed.

Abstract: A data storage device may include: a storage configured as a group of a plurality of memory blocks; and a controller configured to: control data input/output of the storage according to a request transferred from a host device; configure one or more first block groups by grouping a preset number of memory blocks which are selected at the same time among the memory blocks during an operation of the storage; configure one or more second block groups by replacing a bad memory block of the respective first block groups with a spare memory block; manage as a special block group a second block group where the spare memory block having replaced the bad memory block is not present in the same plane of the bad memory block, among the second block groups; and write data having a preset property to the special block group.

Abstract: A data storage apparatus includes a storage configured to include a storage configured to include at least one die including a plurality of planes, wherein each of the plurality of planes contains a set of a plurality of memory blocks, each including a plurality of pages configured of a plurality of memory cells; and a controller configured to: control data input to and output from the storage according to a request received from a host apparatus, receive a plurality of read requests including respective access addresses and access sizes from the host apparatus, generate one or more paired read requests from among the plurality of read requests so that a region to be accessed in one read operation is minimized, and determine a read option for each of the paired read requests.

Abstract: A memory system includes a memory device including a plurality of memory blocks, and a block management unit suitable for selecting a target super block and floating blocks from the memory blocks, matching blocks included in the target super block with the floating blocks, and changing the target super block to a super block.

Abstract: A method for operating a data storage device includes determining a first weight based on the sum of data sizes for commands queued in a command queue; determining a second weight by summing weights by types of the commands; and controlling an urgent command selection threshold value for selecting an urgent command existing in the command queue, based on at least one of the first weight and the second weight.

Abstract: A method for operating a data storage device, the method comprising: enqueuing requests for a nonvolatile memory device, received from a host device, in a first queue; determining whether a starvation time of a request which is not enqueued in a second queue and has a relatively low priority, among the requests queued in the first queue is reaching to a predetermined response time; and enqueuing, based on a determination result, any one between the request which has the low priority and a request which is not enqueued in the second queue and has a high priority among the requests queued in the first queue, in the second queue.

Abstract: A storage device may include: a protocol processing unit suitable for communicating with a host based on a predetermined protocol, and transferring a response signal to at least one status request signal that is received from the host; a power management unit suitable for supplying a power source voltage, and outputting a detection signal which represents a low voltage detection status where the power source voltage has a voltage level lower than a predetermined voltage level; and a core unit suitable for blocking a transfer of the response signal by the protocol processing unit in response to the detection signal, and processing at least one task request which is received from the host through the protocol processing unit after the blocking.

Abstract: A memory system includes a memory device including first and second memory blocks, a cache read mode setting unit suitable for determining a memory block to store and manage map data for user data among the first memory block and the second memory block, and a controller suitable for performing a read operation on the user data and the map data and an update operation on the map data in parallel.

Abstract: Provided herein may be a storage device configured to perform a cache read operation by each memory device. The storage device may include a plurality of memory devices each including a plurality of memory blocks, and a memory controller configured to store and set cache setting information for each of the plurality of memory device, and control the plurality of memory devices such that, as a read operation on a select one of the plurality of memory devices, one of a cache read operation and a normal read operation is performed based on the cache setting information set for of the select memory device.

Abstract: A data storage device includes a storage medium including a plurality of logical units; and a controller suitable for accessing the storage medium by logical unit, the controller comprising: a first processor suitable for aligning tasks corresponding to at least one logical unit among the plurality of logical units, depending on a priority; and a second processor suitable for accessing other logical units among the plurality of logical units, wherein the first processor entrusts a task alignment operation for the other logical units, to the second processor, based on workloads of the first and second processors.

Abstract: Provided herein may be a memory system and a method of operating the memory system. The memory system may include a semiconductor device in which data are stored, and a memory controller for communicating with the semiconductor device, sequentially processing tasks included in a descriptor, detecting an error section by checking the tasks in reverse order when an error occurred in the tasks, and reprocessing the tasks included in the detected error section.

Abstract: A memory controller for use in a memory system includes: a central processing unit configured to generate commands in response to a request received from a host; and a queue controller configured to queue the commands in order of similar operation times.

Abstract: A controller includes a power management unit suitable for providing and monitoring an operational voltage; a counter suitable for measuring a Low Voltage Detection (LVD) time, in which the operational voltage stays within an LVD range; a processor suitable for controlling a memory device to store write data with the LVD time corresponding to the write data stored into the memory device; and an LVD controller suitable for determining, during a recovery operation after occurrence of an LVD fail, a reason for a system fail as the LVD fail based on the LVD times and suitable for performing a debugging operation on a target data, which has the LVD time longer than a predetermined threshold time.

Abstract: Provided herein may be a memory system and a method of operating the memory system. The memory system may include: a memory device comprising a plurality of semiconductor devices each including a plurality of memory blocks; and a controller configured to generate at least one or more descriptors in response to a request from a host, and control internal operations of the plurality of semiconductor devices based on the respective at least one or more descriptors. The controller may generate and manage at least one or more descriptor indexes respectively corresponding to the at least one or more descriptors. When a failure occurs during the internal operations of the plurality of semiconductor devices, at least one descriptor corresponding to a memory block in which the failure has occurred is searched for using the at least one or more descriptor indexes.