Abstract: A first embodiment of the present invention provides logic to select between one of three or more user entered video standards and one or more selectable default video standards. The logic overrides the default standard with the user selected standard. A second embodiment includes a state machine that sets a mode output to a default standard from among two or more standards specified at the factory using jumper pins. The state machine can step through the two or more available standard modes, thereby changing the picture displayed to the user and, as desired, allowing the user to indicate what standard should be used.

Abstract: An LED printhead or the like includes a data bus for carrying multibit digital image data signals for grey level recording. A token bit signal is generated and shifted through registers upon the printhead to enable image data registers associated with each LED to latch the image data signals in appropriate order. The image data signals control the energization times for recording pixels. A digitally adjustable current mirror controls the level of current to each LED during recording. Digital current data signals for controlling this level of current are also communicated over one of the lines of the data bus. A token bit signal is also used to control the latching of current data signals in registers storing the digital data used for current control.

Abstract: A programmable, UV erasable integrated circuit for the generation of various timing sequences. It includes one AND plane, two OR planes, scan path pipeline registers to allow programming and reading, two counters, and a block of high speed logic which runs at an integer multiple of the clock rate of the pipeline registers. The high speed logic also includes a means for smoothly adjusting the positions of various edges of output signals by changing external resistors.