Abstract: An electronic device provides, to a display, data to present a user interface that includes a plurality of user interface objects, and a current focus on a first user interface object. While the display is presenting the user interface, the electronic device receives an input that corresponds to a movement of a contact across on a touch-sensitive surface. The electronic device, in response to receiving the input and in accordance with a determination that a first axis is a dominant axis, moves the current focus along the first axis by a first amount and along the second axis by a second amount. The amount of movement of the current focus along the second axis is reduced to a first non-zero amount by a scaling factor that is based on one or more inputs received prior to receiving the input.

Abstract: The invention relates to a pulse-skipping power converter. In one aspect, a power converter has two stages. When the load is high, both stages are enabled. As the load decreases, one or both of the stages may enter pulse-skipping mode to improve efficiency. As the load is reduced further, the one or both of the stages may be disabled. When both stages are disabled, an auxiliary power supply may be enabled. In a further aspect, an error signal is produced by comparing a signal representative of an output voltage or current of the power converter relative to a level. A pulse-width modulation (PWM) signal including a series of pulses is produced by comparing the error signal to a ramp signal. The duty cycle of the PWM signal is compared to a reference duty cycle. If the duty cycle of the PWM signal is less then the reference duty cycle then the next pulse in the PWM signal is skipped.

Abstract: A current inrush limiting technique for a switching power converter. In one aspect, a switching power converter includes a main power switch and a current sensor. When the input current exceeds a first threshold, the main power switch is opened. When the input current exceeds a second threshold, higher than the first threshold, a current-limiting resistance is coupled to receive the input current. Accordingly, the input current is limited in two stages by two different techniques. In another aspect, a bleed resistor receives current from a power source for providing power to a controller for the power converter. After start-up, such as when an output voltage of the power converter is available to provide power to the controller, the current-limiting resistor is shorted and the bleed resistor is effectively removed. A single pin of an integrated circuit controller controls shorting of the current-limiting resistor and removal of the bleed resistor.

Abstract: An improved technique for limiting current in a switching power converter. The switching power converter includes a soft-start circuit which slowly increases a switching duty cycle upon power-up. Once the converter is operating normally, the duty cycle is controlled to regulate the output voltage. In the event an excessive output current is detected, soft-start circuit is controlled to reduce the switching duty cycle. More particularly, a soft-start capacitor may be discharged during portions of a clock period used to control switching.

Abstract: A current limiting technique for a voltage converter. A current through a reactive element in a voltage converter is limited. Current from a supply is switched through a reactive element in accordance with a switch control signal for forming a regulated output voltage in a feedback loop. A first signal that is representative of the input current is sensed. A voltage that is representative of the output voltage of the voltage converter is sensed. A second signal that is representative of a difference between the output voltage and a desired voltage is formed. A selected one of the first signal and the second signal is compared to a ramp signal for forming the switch control signal wherein the selected one of the first signal and the second signal is selected according to the relative magnitudes of the first and second signal.

Abstract: A switching power supply which uses carrier control and input voltage sensing. In one aspect, an output voltage is monitored to form a carrier signal. The carrier signal is compared to a signal that is representative of the input current in order to control the switching duty cycle. In addition, a signal representative of the input voltage is summed with the signal that is representative of the input current, or with the carrier signal, in order to effectively control the switching duty cycle under light load conditions and conditions in which the input voltage can vary.

Abstract: A low power mode and feedback arrangement for a switching power converter. Two or more main power switches, such as transistors, transfer energy from a supply to load by their opening and closing. When the load requires a relatively low power level, this condition is detected. In response, one or more of the transistor switches is disabled from switching and the reduced power requirements of the load are handled by the remaining one or more transistor switches. As a result, switching losses are reduced. This is because parasitic gate capacitance and on-resistance associated with the disabled switches no longer consume power from the power source. The invention provides significant efficiency advantages during periods when the load draws a low level of power. This is especially useful for battery-powered devices which may operate in a low power mode for extended periods of time, such as standby mode as in a portable telephone.

Abstract: A low power mode and feedback arrangement for a switching power converter. Two or more main power switches, such as transistors, transfer energy from a supply to load by their opening and closing. When the load requires a relatively low power level, this condition is detected. In response, one or more of the transistor switches is disabled from switching and the reduced power requirements of the load are handled by the remaining one or more transistor switches. As a result, switching losses are reduced. This is because parasitic gate capacitance and on-resistance associated with the disabled switches no longer consume power from the power source. The invention provides significant efficiency advantages during periods when the load draws a low level of power. This is especially useful for battery-powered devices which may operate in a low power mode for extended periods of time, such as standby mode as in a portable telephone.

Abstract: A power factor correction circuit arrangement. A rectified alternating-current (AC) input signal may be applied across inputs of a voltage converter circuit, such as a boost converter. Current drawn by the voltage converter may be sensed to form a first sensing signal that is representative of the current. The rectified input voltage may be converted to a second sensing signal that is representative of the AC input signal. Switching in the power converter is adjusted in a first feedback loop to equalize the first and second sensing signals and, thus, the current drawn is regulated to remain in phase with the AC input signal. A feedback signal adjusts switching so as to regulate the output voltage level of the voltage converter in a second feedback loop and, thus, controls power delivered to the load.

Abstract: A current limiting technique for a voltage converter. A current through a reactive element in a voltage converter is limited. Current from a supply is switched through a reactive element in accordance with a switch control signal for forming a regulated output voltage in a feedback loop. A first signal that is representative of the input current is sensed. A voltage that is representative of the output voltage of the voltage converter is sensed. A second signal that is representative of a difference between the output voltage and a desired voltage is formed. A selected one of the first signal and the second signal is compared to a ramp signal for forming the switch control signal wherein the selected one of the first signal and the second signal is selected according to the relative magnitudes of the first and second signal.

Abstract: An improved technique for limiting current in a switching power converter. The switching power converter includes a soft-start circuit which slowly increases a switching duty cycle upon power-up. Once the converter is operating normally, the duty cycle is controlled to regulate the output voltage. In the event an excessive output current is detected, soft-start circuit is controlled to reduce the switching duty cycle. More particularly, a soft-start capacitor may be discharged during portions of a clock period used to control switching.

Abstract: A current inrush limiting technique for a switching power converter. In one aspect, a switching power converter includes a main power switch and a current sensor. When the input current exceeds a first threshold, the main power switch is opened. When the input current exceeds a second threshold, higher than the first threshold, a current-limiting resistance is coupled to receive the input current. Accordingly, the input current is limited in two stages by two different techniques. In another aspect, a bleed resistor receives current from a power source for providing power to a controller for the power converter. After start-up, such as when an output voltage of the power converter is available to provide power to the controller, the current-limiting resistor is shorted and the bleed resistor is effectively removed. A single pin of an integrated circuit controller controls shorting of the current-limiting resistor and removal of the bleed resistor.

Abstract: A volt-second balanced, power factor correction (PFC), pulse-width modulation (PWM) two-stage power converter. A first PFC stage receives an AC input signal and forms a regulated intermediate output voltage. A second stage receives the intermediate output voltage and forms a regulated DC output voltage. A level of the intermediate output voltage is monitored and used to adjust the duty cycle of a main power switch in the PWM stage. By adjusting the PWM duty cycle based on the level of the intermediate output voltage, rather than the DC output voltage, the PWM converter is volt-second balanced. Further, when a controller for the power converter is implemented as an integrated circuit, a pin is not required for monitoring the regulated DC output. Accordingly, the number of pins is minimized.

Abstract: A current limiting technique for a voltage converter. Parasitic resistance of an inductor in an input path to the converter is used to determine the level of current input to the converter. If the measured current level is excessive, then switching in the converter may be interrupted until the current falls to an acceptable level. A modulated input current passes through an inductor of a voltage converter. An input voltage at a first terminal of the inductor is filtered and compared to an output voltage formed at a second terminal of the inductor. The difference in these values is indicative of a voltage across the parasitic resistor and, thus, is indicative of the input current. When the difference exceeds a predetermined level, the input current may be interrupted until the current in the inductor falls to an acceptable level. Current in one or both directions may be monitored for an excessive level.

Abstract: A low power mode and feedback arrangement for a switching power converter. Two or more main power switches, such as transistors, transfer energy from a supply to load by their opening and closing. When the load requires a relatively low power level, this condition is detected. In response, one or more of the transistor switches is disabled from switching and the reduced power requirements of the load are handled by the remaining one or more transistor switches. As a result, switching losses are reduced. This is because parasitic gate capacitance and on-resistance associated with the disabled switches no longer consume power from the power source. The invention provides significant efficiency advantages during periods when the load draws a low level of power. This is especially useful for battery-powered devices which may operate in a low power mode for extended periods of time, such as standby mode as in a portable telephone.

Abstract: A power factor correction circuit arrangement. A rectified alternating-current (AC) input signal may be applied across inputs of a voltage converter circuit, such as a boost converter. Current drawn by the voltage converter may be sensed to form a first sensing signal that is representative of the current. The rectified input voltage may be converted to a second sensing signal that is representative of the AC input signal. Switching in the power converter is adjusted in a first feedback loop to equalize the first and second sensing signals and, thus, the current drawn is regulated to remain in phase with the AC input signal. A feedback signal adjusts switching so as to regulate the output voltage level of the voltage converter in a second feedback loop and, thus, controls power delivered to the load.

Abstract: A current limiting technique for a voltage converter. Parasitic resistance of an inductor in an input path to the converter is used to determine the level of current input to the converter. If the measured current level is excessive, then switching in the converter may be interrupted until the current falls to an acceptable level. Because parasitic resistance is used to detect the input current, rather than a dedicated sensing resistor, fewer components are required. Thus, implementation of the converter and its associated control circuitry is simplified. A modulated input current passes through an inductor of a voltage converter. An input voltage at a first terminal of the inductor is filtered and compared to an output voltage formed at a second terminal of the inductor. The difference in these values is indicative of a voltage across the parasitic resistor and, thus, is indicative of the input current.

Abstract: A low power mode and feedback arrangement for a switching power converter. Two or more main power switches, such as transistors, transfer energy from a supply to load by their opening and closing. When the load requires a relatively low power level, this condition is detected. In response, one or more of the transistor switches is disabled from switching and the reduced power requirements of the load are handled by the remaining one or more transistor switches. As a result, switching losses are reduced. This is because parasitic gate capacitance and on-resistance associated with the disabled switches no longer consume power from the power source. The invention provides significant efficiency advantages during periods when the load draws a low level of power. This is especially useful for battery-powered devices which may operate in a low power mode for extended periods of time, such as standby mode as in a portable telephone.

Abstract: A low power mode and feedback arrangement for a switching power converter. Two or more main power switches, such as transistors, transfer energy from a supply to load by their opening and closing. When the load requires a relatively low power level, this condition is detected. In response, one or more of the transistor switches is disabled from switching and the reduced power requirements of the load are handled by the remaining one or more transistor switches. As a result, switching losses are reduced. This is because parasitic gate capacitance and on-resistance associated with the disabled switches no longer consume power from the power source. The invention provides significant efficiency advantages during periods when the load draws a low level of power. This is especially useful for battery-powered devices which may operate in a low power mode for extended periods of time, such as standby mode as in a portable telephone.

Abstract: A low power mode and feedback arrangement for a switching power converter. Two or more main power switches, such as transistors, transfer energy from a supply to load by their opening and closing. When the load requires a relatively low power level, this condition is detected. In response, one or more of the transistor switches is disabled from switching and the reduced power requirements of the load are handled by the remaining one or more transistor switches. As a result, switching losses are reduced. This is because parasitic gate capacitance and on-resistance associated with the disabled switches no longer consume power from the power source. The invention provides significant efficiency advantages during periods when the load draws a low level of power. This is especially useful for battery-powered devices which may operate in a low power mode for extended periods of time, such as standby mode as in a portable telephone.