Patents by Inventor Jeffrey Hilland

Jeffrey Hilland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11599708
    Abstract: Data is organized in a hierarchical data tree having nodes, and is formatted in human-readable data according to a schema. The data is canonically ordered in correspondence with a canonical ordering of a schema dictionary generated from the schema. The canonically ordered data is encoded into binary, including for each node, removing a label of the node, and adding a sequence number of the node corresponding to the canonical ordering, in binary.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: March 7, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: William Scherer, III, Michael Garrett, Jeffrey Hilland
  • Publication number: 20210192124
    Abstract: Data is organized in a hierarchical data tree having nodes, and is formatted in human-readable data according to a schema. The data is canonically ordered in correspondence with a canonical ordering of a schema dictionary generated from the schema. The canonically ordered data is encoded into binary, including for each node, removing a label of the node, and adding a sequence number of the node corresponding to the canonical ordering, in binary.
    Type: Application
    Filed: March 10, 2021
    Publication date: June 24, 2021
    Inventors: William SCHERER, III, Michael GARRETT, Jeffrey HILLAND
  • Patent number: 8291176
    Abstract: The disclosed embodiments may relate to protection domain group, which may include a memory region associated with a process. The protection domain group may also include a plurality of memory windows associated with the memory region. Also included may be a plurality of protection domains, each of which may correspond to a memory window. The protection domains may allow access to the memory region via a corresponding memory window.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: October 16, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeffrey Hilland, David J. Garcia
  • Publication number: 20070100931
    Abstract: A distributed managed system including targets, clients, and a management processor. Each client is adapted to originate commands with at least some commands having a desired destination of one or more targets. The management processor is adapted to receive commands originated by the clients and generate a context value for each received command having a desired destination. The context value indicates a particular client that originated the command. The management processor adds the context value to each corresponding command to create commands with context and dispatches commands with context to the desired destination. At least one target is adapted to receive the commands with context, interpret the context value to identify the particular client that originated the command, and process the commands with context.
    Type: Application
    Filed: October 28, 2005
    Publication date: May 3, 2007
    Inventors: Keith Kinnan, Darren Cepulis, Jeffrey Hilland, David Joy
  • Publication number: 20050066333
    Abstract: The disclosed embodiments relate to a method and apparatus for providing notification. The apparatus may comprise a plurality of completion queue handlers associated with a communication device. Each of the plurality of completion queue handlers may be associated with a plurality of processes. At least one completion queue may be associated with at least one of the plurality of completion queue handlers.
    Type: Application
    Filed: September 18, 2003
    Publication date: March 24, 2005
    Inventors: Michael Krause, Jeffrey Hilland
  • Publication number: 20050038941
    Abstract: The disclosed embodiments relate to an optimized memory registration mechanism that may comprise an upper layer protocol that associates I/O buffers with memory regions and that manages steering tags. The memory regions may be associated with a translation page table. The upper layer protocol may allocate one of the steering tags associated with at least one of the memory regions for a memory operation.
    Type: Application
    Filed: August 14, 2003
    Publication date: February 17, 2005
    Inventors: Mallikarjun Chadalapaka, Dwight Barron, Paul Culley, Jeffrey Hilland, James Wendt
  • Publication number: 20050038918
    Abstract: An apparatus employs a work request list to access a memory device. The apparatus comprises an upper layer protocol that generates the work request list comprising a plurality of work requests, the work request list having an attribute that indicates the number of the plurality of work requests in the work request list. The apparatus additionally comprises an interface that is adapted to receive the work request list and individually enqueue the plurality of work requests.
    Type: Application
    Filed: August 14, 2003
    Publication date: February 17, 2005
    Inventors: Jeffrey Hilland, Mallikarjun Chadalapaka, Michael Krause, Paul Culley, David Garcia
  • Publication number: 20040205379
    Abstract: The disclosed embodiments may relate to protection domain group, which may include a memory region associated with a process. The protection domain group may also include a plurality of memory windows associated with the memory region. Also included may be a plurality of protection domains, each of which may correspond to a memory window. The protection domains may allow access to the memory region via a corresponding memory window.
    Type: Application
    Filed: March 27, 2003
    Publication date: October 14, 2004
    Inventors: Jeffrey Hilland, David J. Garcia
  • Publication number: 20040193833
    Abstract: The disclosed embodiments may relate to an address translation mechanism that may include a request that corresponds to a memory access operation. The request may include an address mode field. The address translation mechanism may also include an address field that may be used as a virtual address or a physical address depending on the contents of the address mode field.
    Type: Application
    Filed: March 27, 2003
    Publication date: September 30, 2004
    Inventors: Kathryn Hampton, Jeffrey Hilland, Paul R. Culley, David J. Garcia