Abstract: An integrated circuit includes a self-calibrating resistor circuit comprising a resistor string, a comparator, a state machine, a reference voltage source, and a reference current source. The current source typically comprises a voltage reference, typically a bandgap reference, and a temperature-independent resistor having a value REXT. In operation, a reference current IREF flows through the resistor string. During a calibration period, the voltage across the string is compared to the bandgap reference voltage, VBG, by the comparator, which controls the state of the state machine. The outputs of the state machine turn on or off the resistors in the string until the voltage across the string, VR, is approximately equal to the reference voltage. The resistance of the resistor string is then equal to RBG=VBG/IREF, which is proportional to REXT, and thus is typically independent of process and temperature.

Abstract: A detector system employing a Viterbi algorithm includes an apparatus and method which constructs a double-state trellis structure for determining a most likely received symbol sequence with respect to an observed sequence of channel output samples. In the double state trellis, pairs of states are identified having equivalent branch metric values which also have a same decision during a path select, thus allowing these pairs of states to share a compare operation of a previous state metric. Consequently, to calculate an updated or current state metric value, an add, compare and select (ACS) circuit may compare only the previous state metric values to determine a minimum value for a transition between two states while combining each previous state metric value with its corresponding branch metric to provide an updated or current state metric value.

Abstract: A Viterbi detector, illustratively used in a magnetic read channel integrated circuit, provides a "final" output signal as to the most likely state of the input data signal. The Viterbi detector typically utilizes branch metric generation, add-compare-select operations, and a path memory. The best state is found prior to the final decision, and is based on the state having the lowest state metric. The best state information is used to choose an output from the path memory, so that the output data from the end of the path memory line associated with the best state is selected as the final decision of the Viterbi detector. This allows for shortening the length of the path memory in typical applications. At least one control loop may also be controlled by preliminary decisions based on the best state.

Abstract: An apparatus and a scheme for adapting a plurality of tap weights in an FIR filter wherein tap weights are adapted for a current data cycle utilizing a current subset of data and the tap weights are adapted for a next data cycle utilizing a next subset of data is described. A method of adapting the plurality of tap weights in an adaptive FIR filter comprises assigning a current time slot for a timeshared tap weight processor during a current data cycle and assigning a different time slot for the timeshared tap weight processor during a next data cycle. The tap weights are adapted for the current data cycle utilizing a current subset of data and the tap weights are adapted for the next data cycle utilizing a next subset of data. In a further enhancement of the present invention method the different time slot for the next data cycle is assigned by rotating time slot assignments for the timeshared tap weight processor.

Abstract: Briefly, in accordance with one embodiment of the invention, a circuit includes: at least one differential amplifier. The differential amplifier is coupled in a circuit configuration so that the differential output voltage signal of the differential amplifier circuit includes a scalable second-order harmonic component of the differential input voltage signal applied to the differential amplifier circuit. Briefly, in accordance with another embodiment of the invention, a method of applying a differential input voltage signal to a differential amplifier circuit to produce a differential output voltage signal includes the step of: driving the differential amplifier circuit so that the differential output voltage signal of the differential amplifier circuit includes a second-order harmonic component of the differential input voltage signal.

Abstract: Briefly, in accordance with one embodiment of the invention, a device for use in a magnetic recording read channel adapted to be coupled to a magneto-resistive (MR) read head comprises: an integrated circuit adapted so as to introduce a controllable amount of second-order nonlinearity into the magnetic recording read channel signal path to at least partially offset nonlinearity associated with use of the MR read head. Briefly, in accordance with another embodiment of the invention, a method of reducing nonlinear signal effects in a magnetic recording read channel signal path associated with use of a magneto-resistive (MR) read head comprises the step of: introducing into the read channel signal path a scalable square of the read channel signal.