Patents by Inventor Jeffrey S. Autor

Jeffrey S. Autor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220179806
    Abstract: In some examples, a baseboard management controller (BMC) includes a communication interface to communicate with a device over a network; and a processor to present a virtual input/output (I/O) device that stores a hierarchical structure of data elements, write information in a first data element of the data elements, the information relating to a configuration of a computer system to be managed by the BMC, and receive an access of the first data element during a configuration stage of the computer system.
    Type: Application
    Filed: December 8, 2020
    Publication date: June 9, 2022
    Inventors: Jeffrey R. Hilland, Jeffrey S. Autor
  • Patent number: 11354259
    Abstract: In some examples, a baseboard management controller (BMC) includes a communication interface to communicate with a device over a network; and a processor to present a virtual input/output (I/O) device that stores a hierarchical structure of data elements, write information in a first data element of the data elements, the information relating to a configuration of a computer system to be managed by the BMC, and receive an access of the first data element during a configuration stage of the computer system.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: June 7, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Jeffrey R. Hilland, Jeffrey S. Autor
  • Patent number: 9395786
    Abstract: A method for cross-layer power management in a multi-layer system includes determining whether there is a service level violation for an application running on a hardware platform. Power consumption of the hardware platform is controlled in response to the service level violation.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: July 19, 2016
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Vanish Talwar, Jeffrey S. Autor, Sanjay Kumar, Parthasarathy Ranganathan
  • Patent number: 8922585
    Abstract: Systems, methods, and other embodiments associated with a display controller are described. One display controller embodiment includes a data store to store overlay control data, a port to communicate with an overlay control data provider, and a logic to provide an overlay to a display device. The display device may be associated with a computing system that does not provide the overlay control data. The logic may be controlled by the overlay control data provider.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: December 30, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeffrey S. Autor, Theodore F. Emerson
  • Patent number: 7652589
    Abstract: In at least some embodiments, a method comprises determining an orientation of a device, said device having at least one component with a selectable function. The method further comprises selecting a function for the at least one component based on the orientation.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: January 26, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Jeffrey S. Autor
  • Publication number: 20090132840
    Abstract: A method for cross-layer power management in a multi-layer system includes determining whether there is a service level violation for an application running on a hardware platform. Power consumption of the hardware platform is controlled in response to the service level violation.
    Type: Application
    Filed: October 9, 2008
    Publication date: May 21, 2009
    Inventors: Vanish Talwar, Jeffrey S. Autor, Sanjay Kumar, Parthasarathy Ranganathan
  • Publication number: 20080094413
    Abstract: Systems, methods, and other embodiments associated with a display controller are described. One display controller embodiment includes a data store to store overlay control data, a port to communicate with an overlay control data provider, and a logic to provide an overlay to a display device. The display device may be associated with a computing system that does not provide the overlay control data. The logic may be controlled by the overlay control data provider.
    Type: Application
    Filed: October 24, 2006
    Publication date: April 24, 2008
    Inventors: Jeffrey S. Autor, Theodore F. Emerson
  • Patent number: 7320086
    Abstract: A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion on the plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). The host/data controller also interleaves data on a plurality of channels associated with each of the plurality of memory modules. The system implements error interrupt control, ECC error reporting, cartridge error power down procedures in response to command errors, storage of error information in unused segments of each DIMM, hot-pug procedure indicator and remote tagging capabilities of memory cartridges and DIMMs.
    Type: Grant
    Filed: December 1, 2005
    Date of Patent: January 15, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Tim Majni, Gary J. Piccirillo, John M. MacLaren, Robert A. Lester, John E. Larson, Jerome J. Johnson, Benjamin H. Clark, Patrick L. Ferguson, Siamak Tavallaei, Jeffrey S. Autor, Christian H. Post, Dan Fink, Jeffery Galloway, Bret D. Roscoe
  • Patent number: 7043647
    Abstract: The invention is directed to a system and related method of allocating power in a rack mounted computer system where the individual servers are powered from a central power supply system. The structure includes a series of serial communication pathways coupling the servers and the individual power supplies in the power supply system. A series of chassis communication modules communicates with servers in its respective chassis, and relays messages to and from a power supply communication module, which is responsible for granting or denying permission for individual servers to allocate power. The disclosed system also envisions intelligent de-allocation of power, for example in the event of a failure of individual components of the central power supply system.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: May 9, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Peter A. Hansen, Andrew Brown, Kevin M. Jones, Jeffrey S. Autor, Andrew C. Cartes, Gordon M. Barton, Michael Sanders
  • Patent number: 7028213
    Abstract: A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion on the plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). The host/data controller also interleaves data on a plurality of channels associated with each of the plurality of memory modules. The system implements error interrupt control, ECC error reporting, cartridge error power down procedures in response to command errors, storage of error information in unused segments of each DIMM, hot-pug procedure indicator and remote tagging capabilities of memory cartridges and DIMMs.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: April 11, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Tim Majni, Gary J. Piccirillo, John M. MacLaren, Robert A. Lester, John E. Larson, Jerome J. Johnson, Benjamin H. Clark, Patrick L. Ferguson, Siamak Tavallaei, Jeffrey S. Autor, Christian H. Post, Dan Fink, Jeffery Galloway, Bret D. Roscoe
  • Patent number: 6950969
    Abstract: A fan controller is described herein that can be connected to other fan controllers to provide fault information from one controller to the other(s). The fan controllers each control one or more fans. The controllers include signal(s) connected between the controllers that transmit fault information from one fan controller to the other(s) without the involvement of the host processor. Further, the controllers are capable of performing a “free wheeling” test in which idle fans are spun and tested.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: September 27, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Clarence Rick Thompson, Melvin Benedict, Vivian McDaniels-Sanders, Jeffrey S. Autor, John S. Lacombe, Michael C. Sanders
  • Publication number: 20030121642
    Abstract: A fan controller is described herein that can be connected to other fan controllers to provide fault information from one controller to the other(s). The fan controllers each control one or more fans. The controllers include signal(s) connected between the controllers that transmit fault information from one fan controller to the other(s) without the involvement of the host processor. Further, the controllers are capable of performing a “free wheeling” test in which idle fans are spun and tested.
    Type: Application
    Filed: December 28, 2001
    Publication date: July 3, 2003
    Inventors: Clarence Rick Thompson, Melvin Kent Benedict, Michael C. Sanders, Vivian McDaniel-Sanders, Jeffrey S. Autor, John S. Lacombe
  • Publication number: 20030088805
    Abstract: A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion on the plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). The host/data controller also interleaves data on a plurality of channels associated with each of the plurality of memory modules. The system implements error interrupt control, ECC error reporting, cartridge error power down procedures in response to command errors, storage of error information in unused segments of each DIMM, hot-pug procedure indicator and remote tagging capabilities of memory cartridges and DIMMs.
    Type: Application
    Filed: September 28, 2001
    Publication date: May 8, 2003
    Inventors: Tim Majni, Gary J. Piccirillo, John M. MacLaren, Robert A. Lester, John E. Larson, Jerome J. Johnson, Benjamin H. Clark, Patrick L. Ferguson, Siamak Tavallaei, Jeffrey S. Autor, Christian H. Post, Dan Zink, Jeffery Galloway, Bret D. Roscoe
  • Publication number: 20030065751
    Abstract: A method for propagating a rack name within a computer server rack. The rack comprises a plurality of server and/or power supply chassis, each with its own chassis controller. The name of the rack is stored in memory in each chassis controller. Rack names are propagated by requesting a rack name or receiving a command to set the rack name at each controller. The rack name is assigned to the rack via manual input through an external port in any of the servers. If a controller receives a rack name from this external port, this rack name is used. If the name comes from another controller and there is no existing name, the new name is accepted. If the new name differs from an existing rack name, the controller issues a naming conflict message and raises a conflict flag.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 3, 2003
    Inventors: Jeffrey S. Autor, Andrew C. Cartes, Kevin M. Jones, Michael C. Sanders
  • Publication number: 20030065958
    Abstract: The invention is directed to a system and related method of allocating power in a rack mounted computer system where the individual servers are powered from a central power supply system. The structure includes a series of serial communication pathways coupling the servers and the individual power supplies in the power supply system. A series of chassis communication modules communicates with servers in its respective chassis, and relays messages to and from a power supply communication module, which is responsible for granting or denying permission for individual servers to allocate power. The disclosed system also envisions intelligent de-allocation of power, for example in the event of a failure of individual components of the central power supply system.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 3, 2003
    Inventors: Peter A. Hansen, Andrew Brown, Kevin M. Jones, Jeffrey S. Autor, Andrew C. Cartes, Gordon M. Barton, Michael C. Sanders
  • Patent number: 6134579
    Abstract: A computer system utilizing multiple processes includes a semaphore for controlling exclusive access of a single process to a selected resource. The semaphore is implemented in the system input/output and controlled, at least in part, by an application specific integrated circuit (ASIC). When a process is attempting to acquire an I/O resource, a read is sent to the semaphore. If the resource is available the semaphore will have a first value, and the semaphore will return that first value to the process indicating that the process has acquired the resource. The ASIC will then change the semaphore value to a second value. If the resource is not available the semaphore will have the second value, and the semaphore will return the second value to the process indicating that the resource is not available.
    Type: Grant
    Filed: August 15, 1997
    Date of Patent: October 17, 2000
    Assignee: Compaq Computer Corporation
    Inventors: Siamak Tavallaei, Jeffrey S. Autor
  • Patent number: 6032271
    Abstract: A device causing a faulty condition in a computer system having devices is isolated by detecting for a faulty condition associated with the devices and identifying the device causing the faulty condition. The devices are coupled to a bus. The faulty condition includes a bus hang condition. The devices are turned off when a bus hang condition is detected. The devices are then turned back on to test the devices. Each device is tested by writing and reading its configuration space. Information on the bus associated with the faulty condition is stored. The stored information is retrieved after the faulty condition has occurred, with the stored information including address, data, and bus control information.
    Type: Grant
    Filed: June 5, 1996
    Date of Patent: February 29, 2000
    Assignee: Compaq Computer Corporation
    Inventors: Alan L. Goodrum, Jeffrey S. Autor, Paul R. Culley, Joseph P. Miller, Siamak Tavallaei, Barry P. Basile, Elizabeth A. Richard, Eric E. Rose
  • Patent number: 6012114
    Abstract: A computer system has a connector and a circuit card that is inserted in the connector. A mechanism that is associated with the connector and the card has a state for indicating when the card is secured to the connector. A controller of the computer system is configured to monitor the state and provide an indication when the state changes. A processor of the computer system is configured to determine when software of the computer system is interacting with the connector and based on the determining and the indication, regulating interaction of the computer system with the card.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: January 4, 2000
    Assignee: Compaq Computer Corporation
    Inventors: Jeffrey S. Autor, Daniel J. Zink
  • Patent number: 5964875
    Abstract: Improved techniques for facilitating identification of a computer system's hardware features to software executing on the computer system are disclosed. In one embodiment, the software is system management software that serves to monitor and control the computer system to reduce failures and/or improve performance. In a general sense, the invention provides a system feature table within a computer system to describe each of the hardware features of the computer system, including feature data and appropriate access mechanisms for additional information. In addition, a user can be notified when the software does not support all the hardware features of the computer system. The invention also is able to identify locations of failing hardware features for easy replacement or examination.
    Type: Grant
    Filed: September 2, 1997
    Date of Patent: October 12, 1999
    Assignee: Compaq Computer Corporation
    Inventors: Jeffrey S. Autor, Gregory T. Noren, John S. Lacombe
  • Patent number: 5918059
    Abstract: Through a menu driven selection procedure, a user is given options for how a server should respond to an actuation of a power switch. In one option, the power switch is disabled to prevent accidental shut down of the power supply in response to power switch actuation. In another option, the shut down of the power supply follows soon after the expiration of a count down timer which is triggered by power switch actuation. A subsequent actuation of the power switch in this option aborts the count down. In yet another option, the shut down of the power supply follows soon after the completion of a graceful shut down of the server operating system which is triggered by power switch actuation. A subsequent actuation of the power switch in this option causes an immediate shut down of the power supply.
    Type: Grant
    Filed: August 15, 1997
    Date of Patent: June 29, 1999
    Assignee: Compaq Computer Corporation
    Inventors: Siamak Tavallaei, John S. Lacombe, Jeffrey S. Autor, Jose A. Santin