Patents by Inventor Jeffrey S. Cross

Jeffrey S. Cross has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190232058
    Abstract: Delivery of peripheral nerve field stimulation (PNFS) in combination with one or more other therapies is described. The other therapy delivered in combination with PNFS may be, for example, a different type of neurostimulation, such as spinal cord stimulation (SCS), or a drug. PNFS and the other therapy may be delivered simultaneously, in an alternating fashion, according to a schedule, and/or selectively, e.g., in response to a request received from a patient or clinician. A combination therapy that includes PNFS may be able to more completely address complex or multifocal pain than would be possible through delivery of either PNFS or other therapies alone. Further, the combination of PNFS with one or more other therapies may reduce the likelihood that neural accommodation will impair the perceived effectiveness PNFS or the other therapies.
    Type: Application
    Filed: April 8, 2019
    Publication date: August 1, 2019
    Inventors: Ethan A. Rooney, Carl D. Wahlstrand, Gary W. King, Thomas E. Cross, JR., Kenneth T. Heruth, Paul W. Wacnik, Jeffrey S. Evanson
  • Patent number: 10300273
    Abstract: Delivery of peripheral nerve field stimulation (PNFS) in combination with one or more other therapies is described. The other therapy delivered in combination with PNFS may be, for example, a different type of neurostimulation, such as spinal cord stimulation (SCS), or a drug. PNFS and the other therapy may be delivered simultaneously, in an alternating fashion, according to a schedule, and/or selectively, e.g., in response to a request received from a patient or clinician. A combination therapy that includes PNFS may be able to more completely address complex or multifocal pain than would be possible through delivery of either PNFS or other therapies alone. Further, the combination of PNFS with one or more other therapies may reduce the likelihood that neural accommodation will impair the perceived effectiveness PNFS or the other therapies.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: May 28, 2019
    Assignee: Medtronic, Inc.
    Inventors: Ethan A. Rooney, Carl D. Wahlstrand, Gary W. King, Thomas E. Cross, Jr., Kenneth T. Heruth, Paul W. Wacnik, Jeffrey S. Evanson
  • Patent number: 10156420
    Abstract: A receiver having an integral stock connector component that extends along the receiver; two extension rod/rail apertures formed through the integral stock connector component, wherein each extension rod/rail aperture is formed so as to slidably receive an extension rod/rail extending from a buttstock, such that each extension rod/rail is slidably movable within one of the extension rod/rail apertures; wherein each extension rod/rail comprises a rod channel and two or more rod dimples/detents formed along the rod channel; and a latch that is movable between an engaged position and a disengaged position, wherein when the latch is in the engaged position, a protrusion portion urges latch elements into the rod/rail apertures a distance that seats the latch elements into the rod dimples/detents, and wherein when the latch is in the disengaged position, the protrusion portion allows the latch elements to retract from the rod dimples/detents and into the rod channels.
    Type: Grant
    Filed: February 20, 2017
    Date of Patent: December 18, 2018
    Inventors: George Huang, Jeffrey S. Cross
  • Patent number: 9766034
    Abstract: A receiver having a stock connector component having a stock connector aperture formed therethrough; two rod apertures formed through the stock connector component, wherein each extension rod aperture is formed so as to slidably receive an extension rod extending from a stock, such that each extension rod is slidably movable within one of the rod apertures; wherein each extension rod comprises a rod channel and two or more rod dimples/detents formed along the rod channel; and a latch that is movable between an engaged position and a disengaged position, wherein when the latch is in the engaged position, a protrusion portion urges latch elements into the rod apertures a distance that seats the latch elements into the rod dimples/detents, and wherein when the latch is in the disengaged position, the protrusion portion allows the latch elements to retract from the rod dimples/detents and into the rod channels.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: September 19, 2017
    Inventors: George Huang, Jeffrey S. Cross
  • Patent number: 9746282
    Abstract: A buttstock having a buttplate that comprises a partial hollow cylinder extending from a surface of the buttplate; a static arm extending from a first portion of the partial hollow cylinder; a dynamic arm extending from a second portion of the partial hollow cylinder, wherein the static arm is separated from the dynamic arm by a compression gap, wherein the dynamic arm can be urged toward the static arm; and an at least partially threaded static arm aperture formed through said static arm and aligned with a dynamic arm aperture formed through said dynamic arm.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: August 29, 2017
    Assignee: Battle Arms Development, Inc.
    Inventors: George Huang, Jeffrey S. Cross
  • Publication number: 20170160047
    Abstract: A receiver having an integral stock connector component that extends along the receiver; two extension rod/rail apertures formed through the integral stock connector component, wherein each extension rod/rail aperture is formed so as to slidably receive an extension rod/rail extending from a buttstock, such that each extension rod/rail is slidably movable within one of the extension rod/rail apertures; wherein each extension rod/rail comprises a rod channel and two or more rod dimples/detents formed along the rod channel; and a latch that is movable between an engaged position and a disengaged position, wherein when the latch is in the engaged position, a protrusion portion urges latch elements into the rod/rail apertures a distance that seats the latch elements into the rod dimples/detents, and wherein when the latch is in the disengaged position, the protrusion portion allows the latch elements to retract from the rod dimples/detents and into the rod channels.
    Type: Application
    Filed: February 20, 2017
    Publication date: June 8, 2017
    Inventors: George Huang, Jeffrey S. Cross
  • Patent number: 9574846
    Abstract: A receiver having an integral stock connector component that extends along the receiver; two extension rod/rail apertures formed through the integral stock connector component, wherein each extension rod/rail aperture is formed so as to slidably receive an extension rod/rail extending from a buttstock, such that each extension rod/rail is slidably movable within one of the extension rod/rail apertures; wherein each extension rod/rail comprises a rod channel and two or more rod dimples/detents formed along the rod channel; and a latch that is movable between an engaged position and a disengaged position, wherein when the latch is in the engaged position, a protrusion portion urges latch elements into the rod/rail apertures a distance that seats the latch elements into the rod dimples/detents, and wherein when the latch is in the disengaged position, the protrusion portion allows the latch elements to retract from the rod dimples/detents and into the rod channels.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: February 21, 2017
    Inventors: George Huang, Jeffrey S. Cross
  • Publication number: 20160305738
    Abstract: A receiver having a stock connector component having a stock connector aperture formed therethrough; two rod apertures formed through the stock connector component, wherein each extension rod aperture is formed so as to slidably receive an extension rod extending from a stock, such that each extension rod is slidably movable within one of the rod apertures; wherein each extension rod comprises a rod channel and two or more rod dimples/detents formed along the rod channel; and a latch that is movable between an engaged position and a disengaged position, wherein when the latch is in the engaged position, a protrusion portion urges latch elements into the rod apertures a distance that seats the latch elements into the rod dimples/detents, and wherein when the latch is in the disengaged position, the protrusion portion allows the latch elements to retract from the rod dim ples/detents and into the rod channels.
    Type: Application
    Filed: June 30, 2016
    Publication date: October 20, 2016
    Inventors: George Huang, Jeffrey S. Cross
  • Publication number: 20160258713
    Abstract: A receiver having an integral stock connector component that extends along the receiver; two extension rod/rail apertures formed through the integral stock connector component, wherein each extension rod/rail aperture is formed so as to slidably receive an extension rod/rail extending from a buttstock, such that each extension rod/rail is slidably movable within one of the extension rod/rail apertures; wherein each extension rod/rail comprises a rod channel and two or more rod dimples/detents formed along the rod channel; and a latch that is movable between an engaged position and a disengaged position, wherein when the latch is in the engaged position, a protrusion portion urges latch elements into the rod/rail apertures a distance that seats the latch elements into the rod dimples/detents, and wherein when the latch is in the disengaged position, the protrusion portion allows the latch elements to retract from the rod dimples/detents and into the rod channels.
    Type: Application
    Filed: March 5, 2015
    Publication date: September 8, 2016
    Inventors: George Huang, Jeffrey S. Cross
  • Patent number: 7017430
    Abstract: After placing a sample in a heating vacuum chamber, a probe is climbed down to a position above a capacitor formed in the sample whose electrical characteristic is supposed to be measured. The probe is contacted with both electrodes of the capacitor, which is confirmed by electrical measurement. In order to measure capacitance loss, after filling N2 gas up in the heating vacuum chamber, a mixed gas is introduced from a line for 3 vol % H2+97 vol % N2 to the inside of the heating vacuum chamber. After pressure has been stabilized there, capacitance loss and lapsed time are measured at the same time. Concentrations of residual H2O and residual O2 in the heating vacuum chamber are measured by a quadrupole mass spectrometer QMS; and at the same time, concentrations of each of residual H2O and residual O2 in an exhaust gas are measured by sensors.
    Type: Grant
    Filed: May 15, 2003
    Date of Patent: March 28, 2006
    Assignee: Fujitsu Limited
    Inventors: Jeffrey S. Cross, Mineharu Tsukada
  • Patent number: 6890769
    Abstract: A ferroelectric capacitor adapted for a non-volatile semiconductor memory comprises a base substrate with an insulating surface, such as a semiconductor substrate formed with semiconductor elements and having a top insulator film, a lower electrode formed on the insulating surface, an oxide ferroelectric layer formed on the lower electrode, a first oxide upper electrode formed on and in contact with the upper surface of the oxide ferroelectric layer, and a second oxide upper electrode formed on the first oxide upper electrode, wherein one of the first and second oxide upper electrodes compromises SRO that contains at least 0.1 at % additive and the other of the first and second oxide upper electrodes comprises IrOx. A non-volatile semiconductor memory or ferroelectric capacitor, having a PZT ferroelectric layer, excellent in characteristics, and capable of being manufactured efficiently, is provided.
    Type: Grant
    Filed: August 1, 2003
    Date of Patent: May 10, 2005
    Assignee: Fujitsu Limited
    Inventor: Jeffrey S. Cross
  • Publication number: 20040023417
    Abstract: A ferroelectric capacitor adapted for a non-volatile semiconductor memory comprises a base substrate with an insulating surface, such as a semiconductor substrate formed with semiconductor elements and having a top insulator film, a lower electrode formed on the insulating surface, an oxide ferroelectric layer formed on the lower electrode, a first oxide upper electrode formed on and in contact with the upper surface of the oxide ferroelectric layer, and a second oxide upper electrode formed on the first oxide upper electrode, wherein one of the first and second oxide upper electrodes comprises SRO that contains at least 0.1 at % additive and the other of the first and second oxide upper electrodes comprises IrOx. A non-volatile semiconductor memory or ferroelectric capacitor, having a PZT ferroelectric layer, excellent in characteristics, and capable of being manufactured efficiently, is provided.
    Type: Application
    Filed: August 1, 2003
    Publication date: February 5, 2004
    Applicant: FUJITSU LIMITED
    Inventor: Jeffrey S. Cross
  • Patent number: 6674633
    Abstract: A method for the fabrication of a cap layer on a top electrode layer of a ferroelectric capacitor includes the steps of depositing an amorphous layer, usually made of Sr(x)Ru(y)O3, on the top electrode and then annealing the amorphous layer in two stages in order convert the amorphous layer into the cap layer. The first anneal is performed at 500° C. to 700° C. in a non-oxidizing atmosphere, such as nitrogen, and converts the amorphous layer into a crystallized layer of Sr(x)Ru(y)O3. The second anneal is performed at 300° C. to 500° C. in an oxidizing atmosphere, such as oxygen, and converts the crystallized layer into the cap layer. The method is applied to the formation of a ferroelectric capacitor element of an integrated semiconductor device.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: January 6, 2004
    Assignee: Fujitsu Limited
    Inventors: Shan Sun, George Hickert, Katsuyoshi Matsuura, Takeyasu Saito, Soichiro Ozawa, Naoyuki Satoh, Mitsushi Fujiki, Satoru Mihara, Jeffrey S. Cross, Yoshimasa Horii
  • Publication number: 20030221496
    Abstract: After placing a sample in a heating vacuum chamber, a probe is climbed down to a position above a capacitor formed in the sample whose electrical characteristic is supposed to be measured. The probe is contacted with both electrodes of the capacitor, which is confirmed by electrical measurement. In order to measure capacitance loss, after filling N2 gas up in the heating vacuum chamber, a mixed gas is introduced from a line for 3 vol %H2+97 vol %N2 to the inside of the heating vacuum chamber. After pressure has been stabilized there, capacitance loss and lapsed time are measured at the same time. Concentrations of residual H2O and residual O2 in the heating vacuum chamber are measured by a quadrupole mass spectrometer QMS; and at the same time, concentrations of each of residual H2O and residual O2 in an exhaust gas are measured by sensors.
    Type: Application
    Filed: May 15, 2003
    Publication date: December 4, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Jeffrey S. Cross, Mineharu Tsukada
  • Patent number: 6649954
    Abstract: A ferroelectric capacitor adapted for a non-volatile semiconductor memory comprises a base substrate with an insulating surface, such as a semiconductor substrate formed with semiconductor elements and having a top insulator film, a lower electrode formed on the insulating surface, an oxide ferroelectric layer formed on the lower electrode, a first oxide upper electrode formed on and in contact with the upper surface of the oxide ferroelectric layer, and a second oxide upper electrode formed on the first oxide upper electrode, wherein one of the first and second oxide upper electrodes comprises SRO that laminating a first and a second oxide upper electrodes onto said oxide contains at least 0.1 at % additive and the other of the first and second oxide upper electrodes comprises IrOx. A non-volatile semiconductor memory or ferroelectric capacitor, having a PZT ferroelectric layer, excellent in characteristics, and capable of being manufactured efficiently, is provided.
    Type: Grant
    Filed: April 17, 2002
    Date of Patent: November 18, 2003
    Assignee: Fujitsu Limited
    Inventor: Jeffrey S. Cross
  • Publication number: 20030102500
    Abstract: A ferroelectric capacitor adapted for a non-volatile semiconductor memory comprises a base substrate with an insulating surface, such as a semiconductor substrate formed with semiconductor elements and having a top insulator film, a lower electrode formed on the insulating surface, an oxide ferroelectric layer formed on the lower electrode, a first oxide upper electrode formed on and in contact with the upper surface of the oxide ferroelectric layer, and a second oxide upper electrode formed on the first oxide upper electrode, wherein one of the first and second oxide upper electrodes comprises SRO that contains at least 0.1 at % additive and the other of the first and second oxide upper electrodes comprises IrOx. A non-volatile semiconductor memory or ferroelectric capacitor, having a PZT ferroelectric layer, excellent in characteristics, and capable of being manufactured efficiently, is provided.
    Type: Application
    Filed: April 17, 2002
    Publication date: June 5, 2003
    Applicant: FUJITSU LIMITED
    Inventor: Jeffrey S. Cross
  • Publication number: 20020149040
    Abstract: A method for the fabrication of a cap layer on a top electrode layer of a ferroelectric capacitor includes the steps of depositing an amorphous layer, usually made of Sr(x)Ru(y)O3, on the top electrode and then annealing the amorphous layer in two stages in order convert the amorphous layer into the cap layer. The first anneal is performed at 500° C. to 700° C. in a non-oxidizing atmosphere, such as nitrogen, and converts the amorphous layer into a crystallized layer of Sr(x)Ru(y)O3. The second anneal is performed at 300° C. to 500° C. in an oxidizing atmosphere, such as oxygen, and converts the crystallized layer into the cap layer. The method is applied to the formation of a ferroelectric capacitor element of an integrated semiconductor device.
    Type: Application
    Filed: February 28, 2001
    Publication date: October 17, 2002
    Inventors: Shan Sun, George Hickert, Katsuyoshi Matsuura, Takeyasu Saito, Soichiro Ozawa, Naoyuki Satoh, Mitsushi Fujiki, Satoru Mihara, Jeffrey S. Cross, Yoshimasa Horii
  • Patent number: 6194228
    Abstract: A method of manufacturing an electronic device including an oxide film of perovskite-type, said method comprising the steps of forming on a base substrate a first conductive oxide film of perovskite type in an atmosphere of reduced pressure at a first temperature, and performing heat treatment on the first conductive oxide film in an oxidizing atmosphere containing oxygen at a second temperature which is higher than the first temperature.
    Type: Grant
    Filed: October 21, 1998
    Date of Patent: February 27, 2001
    Assignee: Fujitsu Limited
    Inventors: Mitsushi Fujiki, Jeffrey S. Cross, Mineharu Tsukada
  • Patent number: D810225
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: February 13, 2018
    Inventors: George Huang, Jeffrey S. Cross