Patents by Inventor Jen-Chun Chen

Jen-Chun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9171770
    Abstract: An electronic device and the manufacturing method thereof are provided. The method comprises providing a module, in which the module includes a substrate, at least one component mounted on the substrate and a molding, and the molding encapsulates the component and a portion of the substrate; forming a first hole to expose a ground pad of the component; forming a first conductive layer which covers the module and is electrically connected to the ground pad.
    Type: Grant
    Filed: January 20, 2013
    Date of Patent: October 27, 2015
    Assignees: Universal Scientific Industrial (Shanghai) Co., Ltd., Universal Global Scientific Industrial Co., Ltd.
    Inventor: Jen-Chun Chen
  • Patent number: 9144183
    Abstract: A package-integrated EMI compartment shielding structure includes an encapsulating member disposed on a mounting surface of a substrate. The substrate has a ground pad exposedly arranged thereon. The encapsulating member, who defines a peripheral surface, covers the ground pad and encapsulates at least one electronic element. A compartment structure is disposed in the encapsulating member, electrically connecting the ground pad and substantially dividing the encapsulating member into at least two package compartments. The terminal portions of the compartment structure are arranged within the encapsulating member proximal to yet without compromising the peripheral surface. A notch is disposed into the encapsulating member from the peripheral surface corresponding to the location of the terminal portions of the compartment structure to expose the lateral surface thereof across the thickness of the encapsulating member.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: September 22, 2015
    Assignee: Universal Scientific Industrial (Shanghai) Co., Ltd.
    Inventors: Jen-Chun Chen, Xiao-Wen Cao, He- Yi Chang
  • Publication number: 20150214075
    Abstract: A manufacturing method of selective electronic packaging device includes the following. A plurality of electronic components is disposed on a surface of a substrate. A photo-sensitive resin material is formed on the surface of the substrate. UV-light is irradiated to the photo-sensitive resin material to form an embankment structure. An encapsulating material is filled a protective area surrounded by the embankment structure. The encapsulating material covers at least one electronic component. The encapsulating material is solidified to form an encapsulating member, and the encapsulating member covers at least one electronic component.
    Type: Application
    Filed: April 6, 2014
    Publication date: July 30, 2015
    Applicant: UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD.
    Inventors: JEN-CHUN CHEN, SHIH-CHIEN CHEN, PAI-SHENG CHENG
  • Patent number: 9089046
    Abstract: An electronic module includes a circuit board, a plurality of electronic components, a plurality of molding layers, at least one first conductive layer, at least one insulating filler, and one second conductive layer. The circuit board has a first plane and at least one grounding pad on the first plane. The electronic components are mounted on the first plane and electrically connected with the circuit board. The molding layers cover the electronic components and the first plane. The trench appears between two adjacent molding layers. The grounding pad is positioned at the bottom of the trench. The first conductive layer covers the sidewall of the trench and the grounding pad. The grounding pad electrically connected with the first conductive layer. The insulating filler is positioned in the trench. The second conductive layer covers the molding layers and the insulating filler, and electrically connects with the first conductive layer.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: July 21, 2015
    Assignees: UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD., UNIVERSAL GLOBAL SCIENTIFIC INDUSTRIAL CO., LTD.
    Inventors: Jen-Chun Chen, Pai-Sheng Shih, Hsin-Chin Chang
  • Publication number: 20150173258
    Abstract: A manufacturing method of electronic packaged device includes the following. A plurality of electronic components is disposed on a substrate carrier. An encapsulating member is disposed on the substrate carrier and covers the electronic components. The substrate carrier is separated from the encapsulating member. A plurality of first trenches is arranged on a first surface of the encapsulating member. Conductive material is disposed onto the first surface and into the first trenches to form a conductive layer. The conductive layer is patterned on the first surface to form a circuit layer. The circuit layer includes at least one grounding pad. A plurality of second trenches is arranged on a second surface of the encapsulating member. At least one shielding structure is formed in the first trenches and the second trenches. An electromagnetic shielding layer is connected to the grounding pad.
    Type: Application
    Filed: May 23, 2014
    Publication date: June 18, 2015
    Applicant: UNIVERSAL SCIENTIFIC INDUSTRIAL ( SHANGHAI ) CO., LTD.
    Inventors: JEN-CHUN CHEN, PAI-SHENG SHIH
  • Publication number: 20150035201
    Abstract: A method of manufacturing electronic package module is provided. The method provides selective molding by attaching tapes on the circuit substrate on which electric components are mounted thereon, forming molding compound to cover the circuit substrate, and removing tapes along with the molding compound thereon.
    Type: Application
    Filed: July 31, 2013
    Publication date: February 5, 2015
    Applicant: UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD.
    Inventors: JEN-CHUN CHEN, TSUNG-JUNG CHENG, CHIA-CHENG LIU
  • Publication number: 20150036296
    Abstract: A package-integrated EMI compartment shielding structure includes an encapsulating member disposed on a mounting surface of a substrate. The substrate has a ground pad exposedly arranged thereon. The encapsulating member, who defines a peripheral surface, covers the ground pad and encapsulates at least one electronic element. A compartment structure is disposed in the encapsulating member, electrically connecting the ground pad and substantially dividing the encapsulating member into at least two package compartments. The terminal portions of the compartment structure are arranged within the encapsulating member proximal to yet without compromising the peripheral surface. A notch is disposed into the encapsulating member from the peripheral surface corresponding to the location of the terminal portions of the compartment structure to expose the lateral surface thereof across the thickness of the encapsulating member.
    Type: Application
    Filed: July 31, 2013
    Publication date: February 5, 2015
    Applicant: UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD.
    Inventors: JEN-CHUN CHEN, XIAO-WEN CAO, HE- YI CHANG
  • Publication number: 20150036297
    Abstract: A method of manufacturing electronic module is provided. The method can perform selective partial molding by forming the tapes in a predetermined area on the circuit substrate, setting electronic components out the predetermined area on the circuit substrate, forming the molding member encapsulating the whole circuit substrate and removing the tapes along of the molding member thereon. Following, forming an EMI shielding layer on the molding member and setting optoelectronics in the predetermined area on the circuit substrate could protect the electronic components from electromagnetic disturbance and avoid the optoelectronics being encapsulated.
    Type: Application
    Filed: July 16, 2014
    Publication date: February 5, 2015
    Inventors: JEN-CHUN CHEN, TSUNG JUNG CHENG, CHIA CHENG LIU
  • Publication number: 20140126161
    Abstract: An electronic package module includes a circuit board having a supporting surface, at least one first electronic component, at least one second electronic component, and at least one molding compound. The first and second electronic components are mounted on the supporting surface. The molding compound is disposed on the supporting surface and covers the supporting surface partially. The molding compound encapsulates the first electronic component yet not the second electronic component.
    Type: Application
    Filed: January 19, 2013
    Publication date: May 8, 2014
    Applicants: UNIVERSAL GLOBAL SCIENTIFIC INDUSTRIAL CO., LTD., UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD.
    Inventors: JEN-CHUN CHEN, HSIN-CHIN CHANG
  • Publication number: 20140070395
    Abstract: An electronic device and the manufacturing method thereof are provided. The method comprises providing a module, in which the module includes a substrate, at least one component mounted on the substrate and a molding, and the molding encapsulates the component and a portion of the substrate; forming a first hole to expose a ground pad of the component; forming a first conductive layer which covers the module and is electrically connected to the ground pad.
    Type: Application
    Filed: January 20, 2013
    Publication date: March 13, 2014
    Applicants: UNIVERSAL GLOBAL SCIENTIFIC INDUSTRIAL CO., LTD., UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD.
    Inventor: JEN-CHUN CHEN
  • Patent number: 8338929
    Abstract: A stacked-type chip package structure in which stacked chips and stacked flexible circuit boards are disposed on a substrate. A plurality of spacer layers is respectively sandwiched between two adjacent chips and stacked on top of each other. In addition, conductive bumps are disposed on the substrate and between the stacked flexible circuit boards, such that the stacked flexible circuit boards are electrically connected to the substrate. Besides, conductive wires are electrically connected between the flexible circuit boards and the chips, so as to form a package structure with multi-layer chips on the substrate. Thereby, electrical performance and reliability of the chips are improved.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: December 25, 2012
    Assignee: Nanya Technology Corporation
    Inventors: Jen-Chun Chen, Wu-der Yang
  • Patent number: 8022523
    Abstract: A multi-chip stack package comprising a first wiring substrate, a first chip, a second wiring substrate, and a second chip is provided. The first wiring substrate is with a front side and a rear side. The first chip is disposed on the front side of the first wiring substrate and electrically connected to the first wiring substrate and the first chip has a first active surface. The second wiring substrate is disposed on the first active surface of the first chip and electrically connected to the first wiring substrate. The second chip is disposed on the second wiring substrate and electrically connected to the second wiring layer. The second active surface of the second chip faces the first active surface of the first chip.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: September 20, 2011
    Assignee: Nanya Technology Corporation
    Inventors: Jen-Chun Chen, Wu-Der Yang
  • Publication number: 20090250822
    Abstract: A multi-chip stack package comprising a first wiring substrate, a first chip, a second wiring substrate, and a second chip is provided. The first wiring substrate is with a front side and a rear side. The first chip is disposed on the front side of the first wiring substrate and electrically connected to the first wiring substrate and the first chip has a first active surface. The second wiring substrate is disposed on the first active surface of the first chip and electrically connected to the first wiring substrate. The second chip is disposed on the second wiring substrate and electrically connected to the second wiring layer. The second active surface of the second chip faces the first active surface of the first chip.
    Type: Application
    Filed: June 10, 2008
    Publication date: October 8, 2009
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventors: Jen-Chun Chen, Wu-Der Yang
  • Publication number: 20090146283
    Abstract: A stacked-type chip package structure in which stacked chips and stacked flexible circuit boards are disposed on a substrate. A plurality of spacer layers is respectively sandwiched between two adjacent chips and stacked on top of each other. In addition, conductive bumps are disposed on the substrate and between the stacked flexible circuit boards, such that the stacked flexible circuit boards are electrically connected to the substrate. Besides, conductive wires are electrically connected between the flexible circuit boards and the chips, so as to form a package structure with multi-layer chips on the substrate. Thereby, electrical performance and reliability of the chips are improved.
    Type: Application
    Filed: March 7, 2008
    Publication date: June 11, 2009
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventors: Jen-Chun Chen, Wu-der Yang