Patents by Inventor Jen-Wei Liu

Jen-Wei Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240126327
    Abstract: The present disclosure provides an electronic wearable device. The electronic wearable device includes a first module having a first contact and a second module having a second contact. The first contact is configured to keep electrical connection with the second contact in moving with respect to each other during a wearing period.
    Type: Application
    Filed: October 14, 2022
    Publication date: April 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chao Wei LIU, Wei-Hao CHANG, Yung-I YEH, Jen-Chieh KAO, Tun-Ching PI, Ming-Hung CHEN, Hui-Ping JIAN, Shang-Lin WU
  • Publication number: 20240091764
    Abstract: A combinable nucleic acid pre-processing apparatus includes a sample transfer chamber transferring a sample from a sampling tube to a nucleic acid extraction kit, a nucleic acid extraction chamber performing a nucleic acid extraction of the sample in the nucleic acid extraction kit for obtaining a nucleic acid extract, an assay setup chamber preparing reagents and transferring reagents and the nucleic acid extract to an assay plate, and at least two bridging modules respectively disposed between the sample transfer chamber and the nucleic acid extraction chamber and between the nucleic acid extraction chamber and the assay setup chamber. The sample transfer chamber, the nucleic acid extraction chamber and the assay setup chamber are separated and operated independently. Three chambers are connected through the bridging modules, so the nucleic acid extraction kit can be sequentially moved in the sample transfer chamber, the nucleic acid extraction chamber and the assay setup chamber.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 21, 2024
    Inventors: Chien-Ting Liu, Shih-Fang Peng, Song-Bin Huang, Guo-Wei Huang, Jen-Chih Tsai
  • Publication number: 20230092846
    Abstract: A combination, comprising a first component and a second component; the first component is selected from a group composed of the following: the compound of formula (I), a pharmaceutically acceptable salt thereof, and a combination thereof, wherein A is a C1-C8 aliphatic hydrocarbon group optionally containing a carbonyl group as needed; X is H or OH; Y is O; and R1 is H or is not present, the condition being that when R1 is not present, Y and A bond to form a five-membered ring; and the second component is selected from a group composed of the following: a topoisomerase inhibitor, a microtubule assembly inhibitor, a platinum-based agent, an antimetabolite, and a combination thereof.
    Type: Application
    Filed: January 14, 2021
    Publication date: March 23, 2023
    Applicant: EVERFRONT BIOTECH INC.
    Inventors: Tzyy-Wen CHIOU, Horng-Jyh HARN, Shinn-Zong LIN, Jui-Hao Lee, Jen-Wei Liu, Szu-Yin Lin
  • Publication number: 20220367262
    Abstract: An opening is formed through a dielectric material layer to physically expose a top surface of a conductive material portion in, or over, a substrate. A metallic nitride liner is formed on a sidewall of the opening and on the top surface of the conductive material portion. A metallic adhesion layer including an alloy of copper and at least one transition metal that is not copper is formed on an inner sidewall of the metallic nitride liner. A copper fill material portion may be formed on an inner sidewall of the metallic adhesion layer. The metallic adhesion layer is thermally stable, and remains free of holes during subsequent thermal processes, which may include reflow of the copper fill material portion. An additional copper fill material portion may be optionally deposited after a reflow process.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 17, 2022
    Inventors: Cheng-Lun TSAI, Huei-Wen HSIEH, Chun-Sheng CHEN, Kai-Shiang KUO, Jen-Wei LIU, Cheng-Hui WENG, Chun-Chien LIN, Hung-Wen SU
  • Patent number: 11430692
    Abstract: An opening is formed through a dielectric material layer to physically expose a top surface of a conductive material portion in, or over, a substrate. A metallic nitride liner is formed on a sidewall of the opening and on the top surface of the conductive material portion. A metallic adhesion layer including an alloy of copper and at least one transition metal that is not copper is formed on an inner sidewall of the metallic nitride liner. A copper fill material portion may be formed on an inner sidewall of the metallic adhesion layer. The metallic adhesion layer is thermally stable, and remains free of holes during subsequent thermal processes, which may include reflow of the copper fill material portion. An additional copper fill material portion may be optionally deposited after a reflow process.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: August 30, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Cheng-Lun Tsai, Huei-Wen Hsieh, Chun-Sheng Chen, Kai-Shiang Kuo, Jen-Wei Liu, Cheng-Hui Weng, Chun-Chieh Lin, Hung-Wen Su
  • Publication number: 20220037203
    Abstract: An opening is formed through a dielectric material layer to physically expose a top surface of a conductive material portion in, or over, a substrate. A metallic nitride liner is formed on a sidewall of the opening and on the top surface of the conductive material portion. A metallic adhesion layer including an alloy of copper and at least one transition metal that is not copper is formed on an inner sidewall of the metallic nitride liner. A copper fill material portion may be formed on an inner sidewall of the metallic adhesion layer. The metallic adhesion layer is thermally stable, and remains free of holes during subsequent thermal processes, which may include reflow of the copper fill material portion. An additional copper fill material portion may be optionally deposited after a reflow process.
    Type: Application
    Filed: July 29, 2020
    Publication date: February 3, 2022
    Inventors: Cheng-Lun TSAI, Huei-Wen HSIEH, Chun-Sheng CHEN, Kai-Shiang KUO, Jen-Wei LIU, Cheng-Hui WENG, Chun-Chieh LIN, Hung-Wen SU
  • Publication number: 20200339557
    Abstract: The present invention relates to benzoxazole derivatives having the following Formula (I): The compounds of the present invention are found to possess the ability to decrease PD-L1 level, suggesting that the compounds of the invention can be used in cancer immunotherapy and treatment or prevention of sepsis or septic shock.
    Type: Application
    Filed: July 9, 2020
    Publication date: October 29, 2020
    Applicant: MACKAY MEDICAL FOUNDATION THE PRESBYTERIAN CHURCH IN TAIWAN MACKAY MEMORIAL HOSPITAL
    Inventors: Yen-Ta LU, Tzenge-Lien SHIH, Chia-Ming CHANG, Tsai-Yin WEI, Jen-Wei LIU
  • Publication number: 20170283408
    Abstract: The present invention relates to benzoxazole derivatives having the following Formula (I): The compounds of the present invention are found to possess the ability to decrease PD-L1 level, suggesting that the compounds of the invention can be used in cancer immunotherapy and treatment or prevention of sepsis or septic shock.
    Type: Application
    Filed: September 17, 2015
    Publication date: October 5, 2017
    Inventors: YEN-TA LU, TZENGE-LIEN SHIH, CHIA-MING CHANG, TSAI-YIN WEI, JEN-WEI LIU
  • Patent number: 8421506
    Abstract: An output buffer with process and temperature compensation comprises an enable terminal, a clock generator, a PMOS threshold voltage detector, an NMOS threshold voltage detector, a first comparator, a second comparator, a first compensation code generator, a second compensation code generator and an output buffer stage, wherein the output buffer stage has an output stage, the output buffer stage means for controlling a drive current generated by the output stage, wherein the output stage has a first voltage output terminal, and the modulated drive current is capable of compensating slew rate of the first voltage output terminal.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: April 16, 2013
    Assignee: National Sun Yat-Sen University
    Inventors: Chua-Chin Wang, Ron-Chi Kuo, Jen-Wei Liu, Ming-Dou Ker
  • Patent number: 8193837
    Abstract: A corner detector comprises a PMOS threshold voltage detector and an NMOS threshold voltage detector, the PMOS threshold voltage detector is composed of a first clock terminal, a first CMOS inverter, a first capacitor, a PMOS threshold voltage function generator and a first voltage output terminal, wherein the PMOS threshold voltage function generator is electrically connected to the first capacitor and applied to generate a first formula of voltage signal as a function of threshold voltage, the NMOS threshold voltage detector is composed of a second clock terminal, a second CMOS inverter, a second capacitor, an NMOS threshold voltage function generator and a second voltage output terminal, wherein the NMOS threshold voltage function generator is electrically connected to the second capacitor and applied to generate a second formula of voltage signal as a function of threshold voltage.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: June 5, 2012
    Assignee: National Sun Yat-Sen University
    Inventors: Chua-Chin Wang, Ron-Chi Kuo, Jen-Wei Liu, Ming-Dou Ker
  • Publication number: 20110298498
    Abstract: A corner detector comprises a PMOS threshold voltage detector and an NMOS threshold voltage detector, the PMOS threshold voltage detector is composed of a first clock terminal, a first CMOS inverter, a first capacitor, a PMOS threshold voltage function generator and a first voltage output terminal, wherein the PMOS threshold voltage function generator is electrically connected to the first capacitor and applied to generate a first formula of voltage signal as a function of threshold voltage, the NMOS threshold voltage detector is composed of a second clock terminal, a second CMOS inverter, a second capacitor, an NMOS threshold voltage function generator and a second voltage output terminal, wherein the NMOS threshold voltage function generator is electrically connected to the second capacitor and applied to generate a second formula of voltage signal as a function of threshold voltage.
    Type: Application
    Filed: July 28, 2010
    Publication date: December 8, 2011
    Inventors: Chua-Chin WANG, Ron-Chi KUO, Jen-Wei LIU, Ming-Dou KER
  • Publication number: 20110291742
    Abstract: An output buffer with process and temperature compensation comprises an enable terminal, a clock generator, a PMOS threshold voltage detector, an NMOS threshold voltage detector, a first comparator, a second comparator, a first compensation code generator, a second compensation code generator and an output buffer stage, wherein the output buffer stage has an output stage, the output buffer stage means for controlling a drive current generated by the output stage, wherein the output stage has a first voltage output terminal, and the modulated drive current is capable of compensating slew rate of the first voltage output terminal.
    Type: Application
    Filed: July 28, 2010
    Publication date: December 1, 2011
    Inventors: Chua-Chin WANG, Ron-Chi Kuo, Jen-Wei Liu, Ming-Dou Ker