Abstract: An example method includes connecting a flow cell to an instrument. The flow cell includes a flow channel including a manifold section having a manifold section swept volume and a detection section having a detection section swept volume. A ratio of the detection section swept volume to manifold section swept volume is at least 10 to 1. A first reagent is pumped through the flow channel. A first chemical reaction is performed between the first reagent and analytes positioned in the detection section. A subsequent reagent is pumped through the flow channel to flush out the remaining reagent. A concentration of at least 99.95 percent of reagent positioned in the detection section is the subsequent reagent, after pumping a total volume of the subsequent reagent through the flow channel that is equal to or less than 2.5 times a total swept volume of the manifold section plus the detection section.

Abstract: A system for secure 3D printing, the system comprising a server computer configured to transmit cryptographic key upon initiation of a print phase, each of the cryptographic keys being unique to individual 3-dimensional objects and unique to individual 3D printers. A 3D printer is configured to print 3-dimensional objects. The 3D printer comprises a network interface, print actuation devices, a processor, and a memory device coupled to the 3D printer containing encrypted printing instructions and computer code for receiving a plurality of cryptographic keys unique to the 3D printer and pertaining to a particular 3-dimensional object, decrypting encrypted printing instructions for printing the particular 3-dimensional object, and performing the decrypted printing instructions to print the particular 3-dimensional object.

Abstract: Particular embodiments described herein can offer a method for managing power for at least one processor that includes evaluating a plurality of ports associated with an electronic device; determining that a particular pin associated with at least one of the ports is not receiving a signal; disabling a squelch function associated with the electronic device; and gating power associated with a physical layer (PHY) of the electronic device.

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques for determining when a communications port is in a first low power state, determining that a coupled device entered a low power state and enabling a second low power state based on the determination that the device has entered the low power state, the second low power state to use less power than the first low power state.

Abstract: A pail facilitating ease of use having a pivotable removal bin. A retention structure pivots about a single axis, the retention structure having two sections that create an overlapping pinch about an upper surface in a first position and a lower surface in a second position. A cutter is located proximal the upper end of the removal bin.

Abstract: A pail facilitating ease of use having a pivotable removal bin. A retention structure pivots about a single axis, the retention structure having two sections that create an overlapping pinch about an upper surface in a first position and a lower surface in a second position. A cutter is located proximal the upper end of the removal bin.

Abstract: Particular embodiments described herein can offer a method for managing power for at least one processor that includes evaluating a plurality of ports associated with an electronic device; determining that a particular pin associated with at least one of the ports is not receiving a signal; disabling a squelch function associated with the electronic device; and gating power associated with a physical layer (PHY) of the electronic device.

Abstract: Particular embodiments described herein can offer a method that includes powering down a root port; initiating a first downstream cycle by a central processing unit (CPU) to the root port; identifying a power up activity for the CPU; and triggering an exit flow for a power state in conjunction with sending a second downstream cycle to the root port. In more particular embodiments, the triggering of the exit flow for the power state and the sending of the second downstream cycle to the root port occurs in a substantially parallel fashion. In addition, a prewake indicator can be sent to the root port to trigger the exit flow before the CPU is powered up and the second downstream cycle is sent.

Abstract: Particular embodiments described herein can offer a method for managing power for at least one processor that includes evaluating a plurality of ports associated with an electronic device; determining that a particular pin associated with at least one of the ports is not receiving a signal; disabling a squelch function associated with the electronic device; and gating power associated with a physical layer (PHY) of the electronic device.

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques for determining when a communications port is in a first low power state, determining that a coupled device entered a low power state and enabling a second low power state based on the determination that the device has entered the low power state, the second low power state to use less power than the first low power state.

Abstract: A pail facilitating ease of use having a pivotable removal bin. A retention structure pivots about a single axis, the retention structure having two sections that create an overlapping pinch about an upper surface in a first position and a lower surface in a second position. A cutter is located proximal the upper end of the removal bin.

Abstract: In accordance with embodiments disclosed herein are mechanisms for enabling multiple bus master engines to share the same request channel to a pipelined backbone including: receiving a plurality of unarbitrated grant requests at an agent bus interface from a plurality of masters, each requesting access to a backbone connected via a common request channel; determining which of the unarbitrated grant requests is to issue first as a final grant request; storing a master identifier code for the final grant request into a FIFO buffer, the master identifier code associating the final grant request with the issuing master among the plurality of masters; waiting for a backbone grant; and presenting the master identifier code for the final grant request to an agent bus interface, wherein the agent bus interface communicates a command and data for processing via a backbone responsive to the backbone grant to fulfill the final grant request.

Abstract: Techniques for embedded high speed serial interface methods are described herein. The techniques provide an apparatus for link equalization including an equalization control module to determine at least a first coefficient setting and a second coefficient setting at a remote transmitter based on an algorithm. The apparatus also includes a receiver margining module to determine a first margin value to be associated with the first coefficient setting and a second margin value to be associated with the second coefficient setting. The receiver margining module is to further determine if at least the first margin value is higher than the second margin value.

Abstract: In accordance with embodiments disclosed herein are mechanisms for enabling multiple bus master engines to share the same request channel to a pipelined backbone including: receiving a plurality of unarbitrated grant requests at an agent bus interface from a plurality of masters, each requesting access to a backbone connected via a common request channel; determining which of the unarbitrated grant requests is to issue first as a final grant request; storing a master identifier code for the final grant request into a FIFO buffer, the master identifier code associating the final grant request with the issuing master among the plurality of masters; waiting for a backbone grant; and presenting the master identifier code for the final grant request to an agent bus interface, wherein the agent bus interface communicates a command and data for processing via a backbone responsive to the backbone grant to fulfill the final grant request.

Abstract: Particular embodiments described herein can offer a method that includes powering down a root port; initiating a first downstream cycle by a central processing unit (CPU) to the root port; identifying a power up activity for the CPU; and triggering an exit flow for a power state in conjunction with sending a second downstream cycle to the root port. In more particular embodiments, the triggering of the exit flow for the power state and the sending of the second downstream cycle to the root port occurs in a substantially parallel fashion. In addition, a prewake indicator can be sent to the root port to trigger the exit flow before the CPU is powered up and the second downstream cycle is sent.

Abstract: Particular embodiments described herein can offer a method for managing power for at least one processor that includes evaluating a plurality of ports associated with an electronic device; determining that a particular pin associated with at least one of the ports is not receiving a signal; disabling a squelch function associated with the electronic device; and gating power associated with a physical layer (PHY) of the electronic device.