Patents by Inventor Jennifer Robbins

Jennifer Robbins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120073050
    Abstract: A dual portion blanket comprising: a first portion, where said first portion includes a double layer of blanketing; and a second portion, where said second portion includes a single layer of blanketing. In one particular embodiment, the first portion includes a side opening on each thereof.
    Type: Application
    Filed: September 26, 2010
    Publication date: March 29, 2012
    Inventor: Jennifer Robbins
  • Patent number: 7517181
    Abstract: A track fitting used to secure a covering to a track extending along an item includes a body and a plunger. The body of the track fitting has at least one foot, adapted to be received in one of a series of openings defined by the track, and the body is also adapted to receive and secure a portion of the covering. The plunger of the track fitting is placed adjacent to and is vertically moveable with respect to the body. The plunger generally moves between a first position that allows movement of the track fitting along the track and a second position in which the plunger engages one of the openings defined by the track, preventing further movement of the track fitting along the track.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: April 14, 2009
    Assignee: J3, LLC
    Inventors: Jeffrey Dunaway, Jeffrey LaMaster, Jennifer Robbins
  • Publication number: 20080064189
    Abstract: A crack stop for low K dielectric materials of an integrated circuit (IC) formed on an IC chip using metal interconnects which do not form a self-passivating oxide layer, such as copper or silver interconnects, in a low-K dielectric material to prevent damage to the active area of the IC chip caused by chipping and cracking formed along peripheral edges of the IC chip during a dicing operation. A moisture barrier or edge seal is formed as a metal stack positioned along the outer peripheral edges of the active area of the IC chip. The crack stop is formed by at least one trench or groove positioned outside of the moisture barrier/edge seal on the outer periphery of the IC chip.
    Type: Application
    Filed: October 31, 2007
    Publication date: March 13, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy Daubenspeck, Jeffrey Gambino, Stephen Luce, Thomas McDevitt, William Motsiff, Mark Pouliot, Jennifer Robbins
  • Publication number: 20080019789
    Abstract: A track fitting used to secure a covering to a track extending along an item includes a body and a plunger. The body of the track fitting has at least one foot, adapted to be received in one of a series of openings defined by the track, and the body is also adapted to receive and secure a portion of the covering. The plunger of the track fitting is placed adjacent to and is vertically moveable with respect to the body. The plunger generally moves between a first position that allows movement of the track fitting along the track and a second position in which the plunger engages one of the openings defined by the track, preventing further movement of the track fitting along the track.
    Type: Application
    Filed: September 18, 2007
    Publication date: January 24, 2008
    Inventors: Jeffrey Dunaway, Jeffrey LaMaster, Jennifer Robbins
  • Publication number: 20060099775
    Abstract: A crack stop for low K dielectric materials of an integrated circuit (IC) formed on an IC chip using metal interconnects which do not form a self-passivating oxide layer, such as copper or silver interconnects, in a low-K dielectric material to prevent damage to the active area of the IC chip caused by chipping and cracking formed along peripheral edges of the IC chip during a dicing operation. A moisture barrier or edge seal is formed as a metal stack positioned along the outer peripheral edges of the active area of the IC chip. The crack stop is formed by at least one trench or groove positioned outside of the moisture barrier/edge seal on the outer periphery of the IC chip.
    Type: Application
    Filed: December 22, 2005
    Publication date: May 11, 2006
    Applicant: International Business Machines Corporation
    Inventors: Timothy Daubenspeck, Jeffrey Gambino, Stephen Luce, Thomas McDevitt, William Motsiff, Mark Pouliot, Jennifer Robbins
  • Publication number: 20050026397
    Abstract: A crack stop for low K dielectric materials of an integrated circuit (IC) formed on an IC chip using metal interconnects which do not form a self-passivating oxide layer, such as copper or silver interconnects, in a low-K dielectric material to prevent damage to the active area of the IC chip caused by chipping and cracking formed along peripheral edges of the IC chip during a dicing operation. A moisture barrier or edge seal is formed as a metal stack positioned along the outer peripheral edges of the active area of the IC chip. The crack stop is formed by at least one trench or groove positioned outside of the moisture barrier/edge seal on the outer periphery of the IC chip.
    Type: Application
    Filed: July 28, 2003
    Publication date: February 3, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy Daubenspeck, Jeffrey Gambino, Stephen Luce, Thomas McDevitt, William Motsiff, Mark Pouliot, Jennifer Robbins