Abstract: A semiconductor device includes type IV semiconductor base substrate, first and second device areas that are electrically isolated from one another, a first region of type III-V semiconductor material formed over the first device area, a second region of type III-V semiconductor material formed over the second device area, the second region of type III-V semiconductor material being laterally electrically insulated from the first region of type III-V semiconductor material, a first high-electron mobility transistor integrally formed in the first region, and a second high-electron mobility transistor integrally formed in the second region. The first and second high-electron mobility transistors are connected in series. A source terminal of the first high-electron mobility transistor is electrically connected to the first device area. The first device area is electrically isolated from a subjacent intrinsically doped region of the base substrate by a first two-way voltage blocking device.

Abstract: A semiconductor device includes type IV semiconductor base substrate, first and second device areas that are electrically isolated from one another, a first region of type III-V semiconductor material formed over the first device area, a second region of type III-V semiconductor material formed over the second device area, the second region of type III-V semiconductor material being laterally electrically insulated from the first region of type III-V semiconductor material, a first high-electron mobility transistor integrally formed in the first region, and a second high-electron mobility transistor integrally formed in the second region. The first and second high-electron mobility transistors are connected in series. A source terminal of the first high-electron mobility transistor is electrically connected to the first device area. The first device area is electrically isolated from a subjacent intrinsically doped region of the base substrate by a first two-way voltage blocking device.

Abstract: A semiconductor device includes type IV semiconductor base substrate, first and second device areas that are electrically isolated from one another, a first region of type III-V semiconductor material formed over the first device area, a second region of type III-V semiconductor material formed over the second device area, the second region of type III-V semiconductor material being laterally electrically insulated from the first region of type III-V semiconductor material, a first high-electron mobility transistor integrally formed in the first region, and a second high-electron mobility transistor integrally formed in the second region. The first and second high-electron mobility transistors are connected in series. A source terminal of the first high-electron mobility transistor is electrically connected to the first device area. The first device area is electrically isolated from a subjacent intrinsically doped region of the base substrate by a first two-way voltage blocking device.

Abstract: A semiconductor device includes type IV semiconductor base substrate, first and second device areas that are electrically isolated from one another, a first region of type III-V semiconductor material formed over the first device area, a second region of type III-V semiconductor material formed over the second device area, the second region of type III-V semiconductor material being laterally electrically insulated from the first region of type III-V semiconductor material, a first high-electron mobility transistor integrally formed in the first region, and a second high-electron mobility transistor integrally formed in the second region. The first and second high-electron mobility transistors are connected in series. A source terminal of the first high-electron mobility transistor is electrically connected to the first device area. The first device area is electrically isolated from a subjacent intrinsically doped region of the base substrate by a first two-way voltage blocking device.

Abstract: A semiconductor device includes a base layer, a dielectric layer over the base layer, an opening extending through the dielectric layer and to a main surface of the base layer, the opening having a sloped sidewall, and an electrically conductive material over the sloped sidewall. An angle between the sloped sidewall and the main surface of the base layer is in a range between 5 degrees and 50 degrees. Corresponding methods of manufacturing the semiconductor device are also provided.

Abstract: A semiconductor device includes a base layer, a dielectric layer over the base layer, an opening extending through the dielectric layer and to a main surface of the base layer, the opening having a sloped sidewall, and an electrically conductive material over the sloped sidewall. An angle between the sloped sidewall and the main surface of the base layer is in a range between 5 degrees and 50 degrees. Corresponding methods of manufacturing the semiconductor device are also provided.