Patents by Inventor Jensen Yang

Jensen Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240112144
    Abstract: A method of implementing administrative services for managing status updates is disclosed. A status update configuration window is provided on a graphical user interface. The status update configuration window comprises a plurality of update settings for configuring recurring status updates. A selection of update settings is received in the status update configuration window comprising an update frequency, a set of update questions, and a schedule for update reminders. The selected update settings are stored as an update template. An update summary window is displayed concurrently with the status update configuration window. The update summary window comprises a limited list of one or more selectable update management functions. A selection of an update management function is received from the update summary window.
    Type: Application
    Filed: October 2, 2023
    Publication date: April 4, 2024
    Inventors: Eric Koslow, Amy Ming Luo, Victor Kmita, Johannes Ma, Ricky Rizal Zein, Joan Roig, Byron Sha Yang, Jack Hanford, Jared Erondu, Elise Fung, Elliot Piersa Dahl, Megan McGowan, Jay Ashish Mahabal, Rahul Rangnekar, William Michael Dybas, Ian William Richard, Nicole Jensen McMullin
  • Publication number: 20240095645
    Abstract: A method of generating customizable goal representation is disclosed. A request from a user to view a goal representation is received. A flexible goal ontology is accessed that comprises one or more goal entities, one or more goal relationships between the goal entities, or one or more goal properties, the one or more goal properties including one or more metadata attributes relating to the one or more goal entities. A set of mapping rules is obtained that defines mappings between one or more goals. The set of mapping rules is evaluated to assemble a customized goal representation tailored to the user. The customized goal representation is updated based on a revaluation of the mapping rules affected by changes to the one or more goal entities, the one or more goal relationships, or the one or more properties.
    Type: Application
    Filed: September 21, 2023
    Publication date: March 21, 2024
    Inventors: Sven Martin Andreas Elfgren, Friedrich I. Riha, Elliot Piersa Dahl, Eric Koslow, Nicole Jensen McMullin, Natasha Hede, Connie Lynn Chen, Alexa Jean Kriebel, Chije Wang'ati, JR., Megan McGowan, Ami Tushar Bhatt, Jeffrey Ryan Gurr, Tyler Kowalewski, Rahul Rangnekar, Byron Sha Yang, Jerry Wu, Ricky Rizal Zein, Romain Beauxis, Adnan Chowdhury, Priya Balasubramanian, Gilles Yvetot, Shaylan Hawthorne, Adnan Pirzada, Matthew Michael Parides, Jenna Nicole Soojin Lee, Ian William Richard, Laura Elizabeth Pearson, Christian Nguyen, Tovin Thomas, Adam Carter, David Achee, David Christopher Sally, Miranda Howitt, Vincent Yao, Seth Goldenberg, Aimee Jin Peng, William Qingdong Yan, Matthew Stephen Wysocki, Michael Ryan Shohoney, Ryan Maas, Asha Camper Singh, Leonardo Faria, Elliot Piersa Dahl
  • Patent number: 10804066
    Abstract: A method for routing data for an e-beam writer includes, with a switching device of the e-beam writer, receiving a packet. The method further includes, with a scheduling engine of the switching device, routing the packet to one of a plurality of output buffers, wherein the routing is based on availabilities of the plurality of output buffers and vacancy levels of memory devices associated with the plurality of output buffers. The method further includes, with the switching device, outputting the packet from an output port associated with a memory device to which the packet is routed.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: October 13, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jensen Yang, Shy-Jay Lin, Yen-Hao Huang
  • Publication number: 20200043692
    Abstract: A method for routing data for an e-beam writer includes, with a switching device of the e-beam writer, receiving a packet. The method further includes, with a scheduling engine of the switching device, routing the packet to one of a plurality of output buffers, wherein the routing is based on availabilities of the plurality of output buffers and vacancy levels of memory devices associated with the plurality of output buffers. The method further includes, with the switching device, outputting the packet from an output port associated with a memory device to which the packet is routed.
    Type: Application
    Filed: October 14, 2019
    Publication date: February 6, 2020
    Inventors: Jensen Yang, Shy-Jay Lin, Yen-Hao Huang
  • Patent number: 10446358
    Abstract: A method includes receiving, by an input buffer of a switching device, a packet, determining, by a scheduling engine of the switching device, a destination output buffer for the packet, receiving, by the scheduling engine of the switching device, an availability of the destination output buffer and a vacancy level of a memory device that is associated with the destination output buffer, and based on the availability of the destination output buffer and the vacancy level of the memory device, determining, by the scheduling engine of the switching device, a routing destination of the packet. The routing destination includes the input buffer, the destination output buffer, and the memory device.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: October 15, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Jensen Yang, Shy-Jay Lin, Yen-Hao Huang
  • Publication number: 20190139733
    Abstract: A method includes receiving, by an input buffer of a switching device, a packet, determining, by a scheduling engine of the switching device, a destination output buffer for the packet, receiving, by the scheduling engine of the switching device, an availability of the destination output buffer and a vacancy level of a memory device that is associated with the destination output buffer, and based on the availability of the destination output buffer and the vacancy level of the memory device, determining, by the scheduling engine of the switching device, a routing destination of the packet. The routing destination includes the input buffer, the destination output buffer, and the memory device.
    Type: Application
    Filed: August 14, 2018
    Publication date: May 9, 2019
    Inventors: Jensen Yang, Shy-Jay Lin, Yen-Hao Huang
  • Patent number: 10049851
    Abstract: A system includes a digital pattern generator (DPG) having a plurality of pixels that are dynamically and individually controllable; a switching device that is coupled to the DPG, the switching device configured to route a packet to the DPG so as to control at least one of the pixels, the switching device further comprising: a plurality of input buffers configured to receive and store the packet through a transmission line; a plurality of output buffers; a plurality of memory devices, wherein each of the plurality of memory devices is associated with one of the plurality of output buffers; and a scheduling engine that is coupled to the plurality of input buffers, the plurality of output buffers, and the plurality of memory devices and is configured to determine a routing path for the packet stored in one of the input buffers based on an availability of the output buffers and a vacancy level the memory devices.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: August 14, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jensen Yang, Shy-Jay Lin, Yen-Hao Huang
  • Publication number: 20170315455
    Abstract: A system includes a digital pattern generator (DPG) having a plurality of pixels that are dynamically and individually controllable; a switching device that is coupled to the DPG, the switching device configured to route a packet to the DPG so as to control at least one of the pixels, the switching device further comprising: a plurality of input buffers configured to receive and store the packet through a transmission line; a plurality of output buffers; a plurality of memory devices, wherein each of the plurality of memory devices is associated with one of the plurality of output buffers; and a scheduling engine that is coupled to the plurality of input buffers, the plurality of output buffers, and the plurality of memory devices and is configured to determine a routing path for the packet stored in one of the input buffers based on an availability of the output buffers and a vacancy level the memory devices.
    Type: Application
    Filed: April 29, 2016
    Publication date: November 2, 2017
    Inventors: Jensen Yang, Shy-Jay Lin, Yen-Hao Huang
  • Patent number: 9761411
    Abstract: A system and method for maskless direct write lithography are disclosed. The method includes receiving a plurality of pixels that represent an integrated circuit (IC) layout; identifying a first subset of the pixels that are suitable for a first compression method; and identifying a second subset of the pixels that are suitable for a second compression method. The method further includes compressing the first and second subset using the first and second compression method respectively, resulting in compressed data. The method further includes delivering the compressed data to a maskless direct writer for manufacturing a substrate. In embodiments, the first compression method uses a run-length encoding and the second compression method uses a dictionary-based encoding. Due to the hybrid compression method, the compressed data can be decompressed with a data rate expansion ratio sufficient for high-volume IC manufacturing.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: September 12, 2017
    Assignee: Taiwain Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Chi Wu, Jensen Yang, Wen-Chuan Wang, Shy-Jay Lin
  • Publication number: 20160211117
    Abstract: A system and method for maskless direct write lithography are disclosed. The method includes receiving a plurality of pixels that represent an integrated circuit (IC) layout; identifying a first subset of the pixels that are suitable for a first compression method; and identifying a second subset of the pixels that are suitable for a second compression method. The method further includes compressing the first and second subset using the first and second compression method respectively, resulting in compressed data. The method further includes delivering the compressed data to a maskless direct writer for manufacturing a substrate. In embodiments, the first compression method uses a run-length encoding and the second compression method uses a dictionary-based encoding. Due to the hybrid compression method, the compressed data can be decompressed with a data rate expansion ratio sufficient for high-volume IC manufacturing.
    Type: Application
    Filed: January 20, 2015
    Publication date: July 21, 2016
    Inventors: Cheng-Chi Wu, Jensen Yang, Wen-Chuan Wang, Shy-Jay Lin